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| author | Tim Newsome <tim@sifive.com> | 2016-05-24 14:37:23 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2016-05-24 14:37:23 -0700 |
| commit | 106ece891aa9ddcd78c65251425ef365298c30dd (patch) | |
| tree | 0d85ae880e285c40a61e5ccf1b8b4531f130ca6b | |
| parent | 8e11417db5e63af0abfb15915ba40f497cf8a646 (diff) | |
| download | riscv-isa-sim-106ece891aa9ddcd78c65251425ef365298c30dd.zip riscv-isa-sim-106ece891aa9ddcd78c65251425ef365298c30dd.tar.gz riscv-isa-sim-106ece891aa9ddcd78c65251425ef365298c30dd.tar.bz2 | |
New encoding.h for new CSR addresses.
| -rwxr-xr-x | debug_rom/debug_rom.S | 2 | ||||
| -rw-r--r-- | debug_rom/debug_rom.h | 8 | ||||
| -rw-r--r-- | riscv/encoding.h | 8 | ||||
| -rw-r--r-- | tests/mprv.S | 2 |
4 files changed, 10 insertions, 10 deletions
diff --git a/debug_rom/debug_rom.S b/debug_rom/debug_rom.S index e7547a0..9c32691 100755 --- a/debug_rom/debug_rom.S +++ b/debug_rom/debug_rom.S @@ -64,7 +64,7 @@ check_halt: exit: # Restore s0. csrr s0, CSR_DSCRATCH - .word 0x79200073 # TODO: dret + dret _entry: # Save s0 in DSCRATCH diff --git a/debug_rom/debug_rom.h b/debug_rom/debug_rom.h index 20f54cd..a619446 100644 --- a/debug_rom/debug_rom.h +++ b/debug_rom/debug_rom.h @@ -5,15 +5,15 @@ static const unsigned char debug_rom_raw[] = { 0x63, 0xc6, 0x04, 0x00, 0x83, 0x24, 0xc0, 0x43, 0x6f, 0x00, 0xc0, 0x01, 0x93, 0x94, 0x14, 0x00, 0x63, 0xc6, 0x04, 0x00, 0x83, 0x34, 0x80, 0x43, 0x6f, 0x00, 0xc0, 0x00, 0x13, 0x00, 0x00, 0x00, 0x23, 0x2e, 0x80, 0x42, - 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x84, 0x00, 0x63, 0x04, 0x04, 0x00, - 0x6f, 0x00, 0x80, 0x05, 0x73, 0x24, 0x20, 0x79, 0x73, 0x00, 0x20, 0x79, - 0x73, 0x10, 0x24, 0x79, 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x04, 0x1c, + 0x73, 0x24, 0x00, 0x7b, 0x13, 0x74, 0x84, 0x00, 0x63, 0x04, 0x04, 0x00, + 0x6f, 0x00, 0x80, 0x05, 0x73, 0x24, 0x20, 0x7b, 0x73, 0x00, 0x20, 0x7b, + 0x73, 0x10, 0x24, 0x7b, 0x73, 0x24, 0x00, 0x7b, 0x13, 0x74, 0x04, 0x1c, 0x13, 0x04, 0xd4, 0xff, 0x63, 0x18, 0x04, 0x02, 0x0f, 0x10, 0x00, 0x00, 0x73, 0x24, 0x00, 0xf1, 0x63, 0x46, 0x04, 0x00, 0x23, 0x2e, 0x90, 0x42, 0x67, 0x00, 0x00, 0x40, 0x13, 0x14, 0x14, 0x00, 0x63, 0x46, 0x04, 0x00, 0x23, 0x3c, 0x90, 0x42, 0x67, 0x00, 0x00, 0x40, 0x13, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x40, 0x73, 0x24, 0x40, 0xf1, 0x23, 0x20, 0x80, 0x10, - 0x73, 0x60, 0x04, 0x79, 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x04, 0x02, + 0x73, 0x60, 0x04, 0x7b, 0x73, 0x24, 0x00, 0x7b, 0x13, 0x74, 0x04, 0x02, 0xe3, 0x0c, 0x04, 0xfe, 0x6f, 0xf0, 0xdf, 0xfb }; static const unsigned int debug_rom_raw_len = 188; diff --git a/riscv/encoding.h b/riscv/encoding.h index 0f1926a..1d5fb0d 100644 --- a/riscv/encoding.h +++ b/riscv/encoding.h @@ -386,7 +386,7 @@ #define MASK_HRET 0xffffffff #define MATCH_MRET 0x30200073 #define MASK_MRET 0xffffffff -#define MATCH_DRET 0x79200073 +#define MATCH_DRET 0x7b200073 #define MASK_DRET 0xffffffff #define MATCH_SFENCE_VM 0x10400073 #define MASK_SFENCE_VM 0xfff07fff @@ -697,9 +697,9 @@ #define CSR_MSCYCLE_DELTA 0x704 #define CSR_MSTIME_DELTA 0x705 #define CSR_MSINSTRET_DELTA 0x706 -#define CSR_DCSR 0x790 -#define CSR_DPC 0x791 -#define CSR_DSCRATCH 0x792 +#define CSR_DCSR 0x7b0 +#define CSR_DPC 0x7b1 +#define CSR_DSCRATCH 0x7b2 #define CSR_MCYCLE 0xf00 #define CSR_MTIME 0xf01 #define CSR_MINSTRET 0xf02 diff --git a/tests/mprv.S b/tests/mprv.S index 36d0104..df346b3 100644 --- a/tests/mprv.S +++ b/tests/mprv.S @@ -21,7 +21,7 @@ _start: csrw CSR_MEPC, t0 # Exit supervisor mode, entering user mode at loop. - .word 0x30200073 # TODO: mret + mret loop: la t0, data |