aboutsummaryrefslogtreecommitdiff
path: root/include
AgeCommit message (Collapse)AuthorFilesLines
2024-11-11platform: Drop IPI warm init and exit hooksSamuel Holland2-27/+7
Now that the SBI IPI core clears IPIs at warm boot in a generic way, none of the drivers or platforms use these hooks, and we can remove them. Platforms need only to initialize the driver once during cold init. If other hooks are needed in the future, they can be added to struct sbi_ipi_device. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-11lib: sbi_ipi: Move initial IPI clear to sbi_ipi_init()Samuel Holland2-4/+0
sbi_ipi_init() expects the platform warm init function to clear IPIs on the local hart, but there is already a generic function to do this. After this change, none of the existing drivers need a warm init callback. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-11lib: sbi_ipi: Make .ipi_clear always target the current hartSamuel Holland1-3/+3
All existing users of this operation target the current hart, and it seems unlikely that a future user will need to clear the pending IPI status of a remote hart. Simplify the logic by changing .ipi_clear (and its wrapper sbi_ipi_raw_clear()) to always operate on the current hart. This incidentally fixes a bug introduced in commit 78c667b6fc07 ("lib: sbi: Prefer hartindex over hartid in IPI framework"), which changed the .ipi_clear parameter from a hartid to a hart index, but failed to update the warm_init functions to match. Fixes: 78c667b6fc07 ("lib: sbi: Prefer hartindex over hartid in IPI framework") Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-11include: sbi: Fix typo errorZhang RunMin1-1/+1
Fix typo in comments describing SBI_SCRATCH_FW_HEAP_SIZE_OFFSET. Signed-off-by: Zhang RunMin <runmin.zhang@ingenic.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-11platform: ensure enough heap size with debug triggers extensionInochi Amaoto1-1/+1
DBTR introduce a big heap allocation to store hart state, this is allocated percpu and needs big space when CPU number is high. Increase the percpu part to fix this problem, and decrease the fixed part to avoid too big heap size. Fixes: 97f234f (lib: sbi: Introduce the SBI debug triggers extension support) Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-05lib: utils/regmap: Use FDT node offset as regmap IDSamuel Holland1-1/+1
Since the FDT is not modified during driver initialization, node offsets are just as suitable as phandles for use as identifiers: they are stable and unique. With this change, it is no longer necessary to pass the phandle to the driver init functions, so these init functions now use the same prototype as other kinds of drivers. This matches what is already done for I2C adapters. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-05lib: utils/gpio: Use FDT node offset as GPIO chip IDSamuel Holland1-1/+1
Since the FDT is not modified during driver initialization, node offsets are just as suitable as phandles for use as identifiers: they are stable and unique. With this change, it is no longer necessary to pass the phandle to the driver init functions, so these init functions now use the same prototype as other kinds of drivers. This matches what is already done for I2C adapters. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-05platform: Drop timer warm init and exit hooksSamuel Holland2-27/+7
Now that driver lifecycle is managed from within the SBI timer core, platforms need only to initialize the driver once during cold init. Remove the remaining platform hooks that are no longer used. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-05lib: sbi_timer: Call driver warm_init from SBI coreSamuel Holland3-3/+3
Currently, the platform's timer device is tracked in two places: the core SBI implementation has `timer_dev`, and the FDT timer layer has `current_driver`. The latter is used for warm initialization of the timer device. However, this warm init is not specific to FDT-based platforms; other platforms call exactly the same functions from the same point in the boot sequence. The code is simplified and made common across platforms by treating warm init and exit as properties of the driver, not the platform. Then the platform's only role is to select and prepare a driver during cold boot. For now, only add a .warm_init hook, since none of the existing drivers need an .exit hook. It could be added in the future if needed. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-10-28include: sbi: Optimize reads of mhartid and mscratchSamuel Holland2-2/+10
csr_read() is marked as volatile and clobbering memory, which is generally the safe thing to do. However, these two CSRs do not have any side effects, and the values returned do not change between calls. The compiler can generate better code if we allow it to reorder calls to these functions and cache the return value. Introduce csr_read_relaxed() for this use case. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-10-26lib: sbi: add Smdbltrp ISA extension supportClément Léger1-1/+3
Add support for the Smdbltrp[1] ISA extension. First thing to do is clearing MDT on entry after setting the first MTVEC (since MDT is reset to 1). Additionally, during trap handling, clear MDT once all critical CSRs have been saved and in return path, restore MSTATUS/H before restoring MEPC to avoid taking another trap which would clobber it. Link: https://github.com/riscv/riscv-double-trap/releases/download/v0.56/riscv-double-trap.pdf [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi: implement firmware feature SBI_FWFT_DOUBLE_TRAPClément Léger1-1/+2
Add support for double trap firmware feature. Link: https://lists.riscv.org/g/tech-prs/message/985 [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi: fwft: factorize menvcfg read/writeClément Léger1-3/+6
MENVCFG access will be used as well for double trap, landing pad and shadow stack fwft support. Factorize that in a common function. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi: send a double trap SSE event to supervisorClément Léger1-0/+1
In case the double trap handler is called and the double trap happened in supervisor mode, send a double trap SSE event. NOTE: this commit depends on the ratification of the new SSE event id for double trap [1]. Link: https://lists.riscv.org/g/tech-prs/message/985 [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi: add Ssdbltrp ISA extension supportClément Léger3-1/+7
Add Ssdbltrp trap handler support for S-mode double trap handling. If the trap is received while in VS-mode, then the trap is redirected to S-mode. If caught while in HS-mode, then an error is returned to the top trap handler which will panic. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi: factorize previous mode computationClément Léger1-0/+5
Previous privilege mode retrieval from mstatus is done at different places, factorize it rather than copy/pasting it again. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi: factorize previous virtualization mode read from regsClément Léger1-0/+9
The same pattern is used at multiple places to verify in which mode the exception was actually taken. Factorize it. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi: Add support to mask/unmask SSE eventsHimanshu Chauhan2-0/+4
Add functions to globally mask/unmask supervisor software events on the calling hart. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-10-25lib: sbi_domain: Use domain data support for per-domain hart contextAnup Patel2-48/+10
The per-domain hartindex_to_context_table[] is yet another per-domain data required for implementing hart entry into (or exit from) domain. Use the recently added domain data support for per-domain hart context so that a dedicated hartindex_to_context_table[] in struct sbi_domain is not needed. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
2024-10-25lib: sbi: Introduce domain dataAnup Patel2-0/+96
Different parts of OpenSBI require their own per-domain data so introduce domain data (or sbi_domain_data) which can be registered by any part of OpenSBI. Using the domain data, the domain framework will create a data pointer for every domain which can be used to maintain some per-domain state. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
2024-10-25include: sbi: Remove cyclic include in sbi_domain_context.hAnup Patel1-1/+2
The sbi_domain_context.h includes sbi_domain.h and the sbi_domain.h also includes sbi_domain_context.h. Remove this cyclic include in sbi_domain_context.h. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi_domain: Make sbi_domain_root_add_memregion() as local functionAnup Patel1-10/+0
The sbi_domain_root_add_memregion() is only used within sbi_domain implementation so rename and make it a local function. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-09-27include: sbi: Don't unconditionally define '__always_inline'Elyes Haouas1-0/+3
Update __always_inline macro define to fix opensbi upstream build for coreboot. Refer, https://qa.coreboot.org/job/coreboot-gerrit/257449/testReport/junit/(root)/clang/EMULATION_QEMU_RISCV_RV64_/ Closes: https://github.com/riscv-software-src/opensbi/issues/366 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-09-26lib: sbi: Remove unused hartid parametersSamuel Holland1-1/+1
None of these functions use their hartid parameter. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-26lib: sbi: Update sbi_{entry,init}_count() to take a hart indexSamuel Holland1-2/+2
All callers already have the hartindex available, so this removes a hartid to hartindex conversion. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-26lib: sbi: Update sbi_domain_is_assigned_hart() to take a hart indexSamuel Holland1-2/+2
This removes redundant hartid to hartindex conversions from four call sites and provides a net reduction in code size. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-26lib: sbi: Use sbi_hartmask in sbi_hsm_hart_interruptible_mask()Samuel Holland3-7/+19
This removes several hartid/hartindex conversions, as well as two loops through the mask for broadcast IPIs. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-26lib: sbi: Update __sbi_hsm_hart_get_state() to take a hart indexSamuel Holland1-1/+1
This removes some hartindex conversions in sbi_system_suspend(), but is mostly intended to support refactoring sbi_hsm_hart_interruptible_mask() to work exclusively with struct sbi_hartmask. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-25lib: utils/irqchip: Look up IMSIC data by hart indexSamuel Holland1-2/+2
This avoids needing to map a hartid to a hart index. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-25lib: sbi: Use current_hartindex() where possibleSamuel Holland2-5/+4
This avoids calls to the expensive sbi_hartid_to_hartindex() function and also makes the firmware smaller. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-25include: sbi: Store the hart index in struct sbi_scratchSamuel Holland1-1/+9
This is a more efficient way to get the index of the current hart than calling a function to loop through the hartindex -> hartid lookup table. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-23lib: sbi: add zicfilp/zicfiss and elp cfi state reflect back in statusDeepak Gupta1-0/+4
This patch adds support to check for zicfilp / zicfiss extension. zicfilp record status of hart's ELP state in *status csr. Missing landing pad sets MPELP in mstatus. When SBI is redirecting back to S/VS/HS, SPELP is set in sstatus/vsstatus. Signed-off-by: Deepak Gupta <debug@rivosinc.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-09-23include: adding support for Zicfilp / Zicfiss encodingsDeepak Gupta1-0/+7
Zicfilp / Zicfiss extension (see link) introduces b2 (LPE) in menvcfg CSR to enable landing pads and b3 (SSE) in menvcfg CSR to enable shadow stack and landing pad for privilege less than M. Additionally extension introduces new bits in *status for recording landing pad state and a new exception type `software check exception` with cause=0x12. Link: https://github.com/riscv/riscv-cfi Signed-off-by: Deepak Gupta <debug@rivosinc.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-09-23include: sbi_bitops: add ULL version for BIT and GENMASKZong Li1-0/+6
Add BIT_ULL and GENMASK_ULL for dealing with 64-bits data on 32-bits CPU, then we don't need to separate the operation to low part and high part. For instance, the MMIO register is 64 bits wide. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-23lib: sbi_domain_context: Fix file permissionsSamuel Holland1-0/+0
These C source files should not be marked as executable. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-23lib: sbi: fwft: add support for SBI_FWFT_POINTER_MASKING_PMLENSamuel Holland3-1/+8
Add support for controlling the pointer masking mode on harts which support the Smnpm extension. This extension can only exist on harts where XLEN >= 64 bits. This implementation selects the mode with the smallest PMLEN that satisfies the caller's requested lower bound. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-20lib: sbi: Fix writes to emulated 32-bit htimedelta CSRSamuel Holland1-0/+2
Writes to the low half CSR should not affect the high half of the value. Make this separation explicit by writing to the delta in memory as two adjacent XLEN-sized values. Fixes: 1e9f88889f8b ("lib: Emulate HTIMEDELTA CSR for platforms not having TIME CSR") Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-20lib: sbi: Use a linked list to track domainsSamuel Holland1-11/+7
This removes the compile-time limit on the number of domains. It also reduces firmware size by about 200 bytes by removing the lookup table. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-20include: sbi_domain: Fix incorrect commentsSamuel Holland1-9/+2
These comments are inaccurate as of commit db56341dfa1f ("lib: sbi: Allow platforms to provide root domain memory regions"), which modified root domain registration to go through sbi_domain_register() like other domains. Fixes: db56341dfa1f ("lib: sbi: Allow platforms to provide root domain memory regions") Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-08-24lib: utils/fdt: Add fdt_get_address_rw() helperSamuel Holland1-1/+6
Help tracking the lifecycle of the FDT blob by indicating which parts of the firmware modify it, and thus invalidate any previously-obtained offsets or pointers to data inside the blob. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-08-24lib: utils/serial: Pass the FDT to fdt_serial_init()Samuel Holland1-2/+2
Indicate that this function does not modify the FDT blob, and deduplicate the call to fdt_get_address(). Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-08-24lib: utils/reset: Pass the FDT to fdt_reset_init()Samuel Holland1-2/+2
Indicate that this function does not modify the FDT blob, and deduplicate the call to fdt_get_address(). Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-08-24lib: utils/timer: Constify FDT pointers in parsing functionsSamuel Holland1-1/+1
Indicate that none of these functions modify the devicetree by constifying the parameter type. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-08-24lib: utils/serial: Constify FDT pointers in parsing functionsSamuel Holland1-1/+1
Indicate that none of these functions modify the devicetree by constifying the parameter type. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-08-24lib: utils/reset: Constify FDT pointers in parsing functionsSamuel Holland1-3/+3
Indicate that none of these functions modify the devicetree by constifying the parameter type. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-08-24lib: utils/regmap: Constify FDT pointers in parsing functionsSamuel Holland1-3/+3
Indicate that none of these functions modify the devicetree by constifying the parameter type. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-08-24lib: utils/irqchip: Constify FDT pointers in parsing functionsSamuel Holland1-1/+1
Indicate that none of these functions modify the devicetree by constifying the parameter type. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-08-24lib: utils/ipi: Constify FDT pointers in parsing functionsSamuel Holland1-1/+1
Indicate that none of these functions modify the devicetree by constifying the parameter type. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-08-24lib: utils/i2c: Constify FDT pointers in parsing functionsSamuel Holland1-2/+2
Indicate that none of these functions modify the devicetree by constifying the parameter type. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-08-24lib: utils/gpio: Constify FDT pointers in parsing functionsSamuel Holland1-2/+2
Indicate that none of these functions modify the devicetree by constifying the parameter type. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
generated by cgit v1.1 at 2026-02-12 19:57:46 +0000