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path: root/include/sbi/riscv_encoding.h
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2025-12-08lib: sbi: Enable Ssqosid Ext using mstateen0Chen Pei1-0/+5
2025-10-21lib: Allow custom CSRs in csr_read_num() and csr_write_num()Anup Patel1-0/+34
2025-07-22include: sbi: Remove unused (LOG_)REGBYTESJessica Clarke1-7/+0
2025-07-22include: sbi: Use array for struct sbi_trap_regs and GET/SET macrosJessica Clarke1-17/+8
2025-05-20lib: Emulate AMO instructions when Zaamo is not availableChao-ying Fu1-14/+20
2025-04-13lib: sbi: Enable Control Transfer Records (CTR) Ext using xstateen.Rajnesh Kanwal1-0/+13
2025-04-13lib: sbi_trap: Add support for vectored interruptsSamuel Holland1-0/+2
2025-03-27lib: sbi: sse: Add support for SSTATUS.SDTClément Léger1-1/+2
2024-12-06lib: sbi_misaligned_ldst: Add handling of vector load/storeNylon Chen1-1/+384
2024-10-26lib: sbi: add Smdbltrp ISA extension supportClément Léger1-1/+3
2024-10-25lib: sbi: implement firmware feature SBI_FWFT_DOUBLE_TRAPClément Léger1-1/+2
2024-10-25lib: sbi: fwft: factorize menvcfg read/writeClément Léger1-3/+6
2024-10-25lib: sbi: add Ssdbltrp ISA extension supportClément Léger1-1/+3
2024-09-23include: adding support for Zicfilp / Zicfiss encodingsDeepak Gupta1-0/+7
2024-09-23lib: sbi: fwft: add support for SBI_FWFT_POINTER_MASKING_PMLENSamuel Holland1-0/+4
2024-08-23lib: sbi: Enhance CSR Handling in system_opcode_insnDongdong Zhang1-1/+17
2024-08-02include: Adjust Sscofpmf mhpmevent mask for upper 8 bitsEric Lin1-1/+1
2024-06-18lib: sbi: Add support for Svade and Svadu extensionsYong-Xuan Wang1-0/+1
2024-03-19lib: sbi: Remove regs parameter from trap irq handling functionsAnup Patel1-0/+2
2024-03-05lib: sbi_misaligned_ldst: Add handling of C.LHU/C.LH and C.SHNylon Chen1-0/+7
2024-03-04lib: sbi: Add support for smcsrind and smcdelegAtish Patra1-3/+22
2024-01-10include: sbi: Add TINFO debug trigger CSRHimanshu Chauhan1-0/+1
2023-12-19lib: sbi: Refactor the code for enable extensions in menvfg CSRYong-Xuan Wang1-5/+0
2023-11-17include: sbi: macros for mseccfg.sseed and .useedHeinrich Schuchardt1-0/+4
2023-10-06lib: sbi: Add support for mconfigptrYangjie Zhang1-0/+1
2023-08-18lib: sbi: Add support for smcntrpmfKaiwen Xue1-0/+4
2023-07-31include: sbi: fix CSR define of mseccfgXiang W1-3/+2
2023-07-13include: sbi: Add macro definitions for mseccfg CSRHimanshu Chauhan1-0/+12
2023-02-27lib: sbi_hart: Enable hcontext and scontextNylon Chen1-0/+2
2022-09-01include: Remove sideleg and sedelegRahul Pathak1-2/+0
2022-08-22include: Add mstatus[h].GVA encodingsVivian Wang1-0/+4
2022-06-21lib: utils: Remove CSRs that set/clear an IMSIC interrupt file bitsAnup Patel1-21/+3
2022-06-21include: sbi: Add mtinst/htinst psuedoinstructionsdramforever1-0/+20
2022-06-01lib: sbi_illegal_insn: Add emulation for fence.tsoSamuel Holland1-0/+3
2022-04-28lib: sbi: Implement Sstc extensionAtish Patra1-0/+4
2022-04-17include: correct the definition of MSTATUS_VSVincent Chen1-1/+1
2022-04-11lib: sbi: Add Smstateen extension definesMayuresh Chitale1-0/+44
2022-04-05include: Add defines for [m|h|s]envcfg CSRsAnup Patel1-0/+27
2022-02-15include: sbi: Add AIA related CSR definesAnup Patel1-0/+76
2022-02-04lib: sbi: Disable interrupt during config matchingAtish Patra1-1/+2
2021-11-11lib: sbi: Support sscofpmf extension in OpenSBIAtish Patra1-0/+25
2021-11-11lib: sbi: Delegate PMU counter overflow interrupt to S modeAtish Patra1-0/+2
2021-11-11riscv: Add new CSRs introduced by Sscofpmf[1] extensionAtish Patra1-0/+34
2020-09-09include: Rename ECALL defines to match latest RISC-V specAnup Patel1-2/+2
2020-09-01include: sbi: Few cosmetic changes in riscv_encoding.hAnup Patel1-87/+139
2020-09-01lib: sbi: Improve PMP CSR detection and progammingAnup Patel1-1/+66
2020-06-08lib: Add RISC-V hypervisor v0.6.1 supportAnup Patel1-3/+12
2020-05-07lib: sbi_tlb: Fix remote TLB HFENCE VVMA implementationAnup Patel1-0/+25
2020-05-07include: sbi: Remove redundant page table related definesAnup Patel1-20/+0
2020-04-17lib: Support vector extensionAtish Patra1-0/+2
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