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| author | Atish Patra <atishp@rivosinc.com> | 2024-11-19 11:34:35 -0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2024-12-02 09:52:04 +0530 |
| commit | d8a483fc7fd05f7c72a1690e0db326bd4bcd5514 (patch) | |
| tree | 463406fb155732d5aea38c531b97f21c86492329 /platform/generic/platform.c | |
| parent | 40e725da031ccdcc76492a7677e418ee5f6ef013 (diff) | |
| download | opensbi-d8a483fc7fd05f7c72a1690e0db326bd4bcd5514.zip opensbi-d8a483fc7fd05f7c72a1690e0db326bd4bcd5514.tar.gz opensbi-d8a483fc7fd05f7c72a1690e0db326bd4bcd5514.tar.bz2 | |
lib: sbi_pmu: PMU raw event v2 support
As per the updated ISA specification and SBI PMU v3.0, lower 56
bits are available for the platform to implement mhpmeventX
encoding. Implement the PMU raw event V2 support defined in SBI
v3.0 which allows more bits for platforms to encode the raw events.
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'platform/generic/platform.c')
| -rw-r--r-- | platform/generic/platform.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/platform/generic/platform.c b/platform/generic/platform.c index fb074d4..fefb08c 100644 --- a/platform/generic/platform.c +++ b/platform/generic/platform.c @@ -392,7 +392,8 @@ static uint64_t generic_pmu_xlate_to_mhpmevent(uint32_t event_idx, uint64_t evt_val = 0; /* data is valid only for raw events and is equal to event selector */ - if (event_idx == SBI_PMU_EVENT_RAW_IDX) + if (event_idx == SBI_PMU_EVENT_RAW_IDX || + event_idx == SBI_PMU_EVENT_RAW_V2_IDX) evt_val = data; else { /** |