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authorInochi Amaoto <inochiama@outlook.com>2023-10-07 11:06:30 +0800
committerAnup Patel <anup@brainfault.org>2023-11-14 21:53:50 +0530
commit492d9b153d00ec2fc2fec89ded42e71df52e27aa (patch)
tree1aac53017e5be305eceb70706862610dcb694cc8 /platform/generic/include
parent8e941e7fe3b8244107832b931980006bf9b0dc55 (diff)
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platform: generic: thead: separate implement of T-HEAD c9xx errata
Separate the implement of T-HEAD c9xx errata to allow any platform with bug related to c9xx cores can use it. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'platform/generic/include')
-rw-r--r--platform/generic/include/thead/c9xx_errata.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/platform/generic/include/thead/c9xx_errata.h b/platform/generic/include/thead/c9xx_errata.h
new file mode 100644
index 0000000..bf97938
--- /dev/null
+++ b/platform/generic/include/thead/c9xx_errata.h
@@ -0,0 +1,13 @@
+
+#ifndef __RISCV_THEAD_C9XX_ERRATA_H____
+#define __RISCV_THEAD_C9XX_ERRATA_H____
+
+/**
+ * T-HEAD board with this quirk need to execute sfence.vma to flush
+ * stale entrie avoid incorrect memory access.
+ */
+#define THEAD_QUIRK_ERRATA_TLB_FLUSH BIT(0)
+
+void thead_register_tlb_flush_trap_handler(void);
+
+#endif // __RISCV_THEAD_C9XX_ERRATA_H____