diff options
| author | Yu Chien Peter Lin <peterlin@andestech.com> | 2022-10-14 08:32:46 +0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2022-10-23 10:26:39 +0530 |
| commit | ef9f02e7fba47412d6c057ba78fd3d89cb4e5fc3 (patch) | |
| tree | b74d62fd2260c139112ec40eb90975f08ffa2f65 /lib/utils/timer/fdt_timer_plmt.c | |
| parent | 88f58a3694c936791eb875d3cc85f1cde41c3d09 (diff) | |
| download | opensbi-ef9f02e7fba47412d6c057ba78fd3d89cb4e5fc3.tar.gz opensbi-ef9f02e7fba47412d6c057ba78fd3d89cb4e5fc3.tar.bz2 opensbi-ef9f02e7fba47412d6c057ba78fd3d89cb4e5fc3.zip | |
lib: utils/timer: Add Andes fdt timer support
Since we can get the PLMT base address and timer frequency from
device tree, move plmt timer device to fdt timer framework.
dts example (Quad-core AX45MP):
cpus {
...
timebase-frequency = <0x3938700>;
...
}
soc {
...
plmt0@e6000000 {
compatible = "andestech,plmt0";
reg = <0x00 0xe6000000 0x00 0x100000>;
interrupts-extended = <&cpu0_intc 0x07
&cpu1_intc 0x07
&cpu2_intc 0x07
&cpu3_intc 0x07>;
};
...
}
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'lib/utils/timer/fdt_timer_plmt.c')
| -rw-r--r-- | lib/utils/timer/fdt_timer_plmt.c | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/lib/utils/timer/fdt_timer_plmt.c b/lib/utils/timer/fdt_timer_plmt.c new file mode 100644 index 00000000..e8be91b9 --- /dev/null +++ b/lib/utils/timer/fdt_timer_plmt.c @@ -0,0 +1,51 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2022 Andes Technology Corporation + * + * Authors: + * Yu Chien Peter Lin <peterlin@andestech.com> + */ + +#include <sbi_utils/fdt/fdt_helper.h> +#include <sbi_utils/timer/fdt_timer.h> +#include <sbi_utils/timer/andes_plmt.h> + +extern struct plmt_data plmt; + +static int fdt_plmt_cold_timer_init(void *fdt, int nodeoff, + const struct fdt_match *match) +{ + int rc; + unsigned long plmt_base; + + rc = fdt_parse_plmt_node(fdt, nodeoff, &plmt_base, &plmt.size, + &plmt.hart_count); + if (rc) + return rc; + + plmt.time_val = (u64 *)plmt_base; + plmt.time_cmp = (u64 *)(plmt_base + 0x8); + + rc = fdt_parse_timebase_frequency(fdt, &plmt.timer_freq); + if (rc) + return rc; + + rc = plmt_cold_timer_init(&plmt); + if (rc) + return rc; + + return 0; +} + +static const struct fdt_match timer_plmt_match[] = { + { .compatible = "andestech,plmt0" }, + {}, +}; + +struct fdt_timer fdt_timer_plmt = { + .match_table = timer_plmt_match, + .cold_init = fdt_plmt_cold_timer_init, + .warm_init = plmt_warm_timer_init, + .exit = NULL, +}; |
