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| author | Ben Zong-You Xie <ben717@andestech.com> | 2025-12-29 15:19:10 +0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2026-02-11 12:03:50 +0530 |
| commit | 9ffacc8ae1ca07ed36d57f887d62a65ae7a44223 (patch) | |
| tree | 5afcb8ec6848672d817dffc27462c5f6f8429357 /lib/utils/reset | |
| parent | 74434f255873d74e56cc50aa762d1caf24c099f8 (diff) | |
| download | opensbi-9ffacc8ae1ca07ed36d57f887d62a65ae7a44223.tar.gz opensbi-9ffacc8ae1ca07ed36d57f887d62a65ae7a44223.tar.bz2 opensbi-9ffacc8ae1ca07ed36d57f887d62a65ae7a44223.zip | |
lib: utils/hsm: factor out ATCSMU code into an HSM driver
Refactor ATCSMU (System Management Unit) support by moving it from a
system utility into a dedicated FDT-based HSM driver.
Key changes include:
- Moving the functions in lib/utils/sys/atcsmu.c into the new HSM driver
- Moving hart start and stop operations on AE350 platform into the new
HSM driver
- Converting the assembly-based functions in sleep.S to C code for the
readability
- Updating the ATCWDT200 driver
Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Link: https://lore.kernel.org/r/20251229071914.1451587-2-ben717@andestech.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'lib/utils/reset')
| -rw-r--r-- | lib/utils/reset/Kconfig | 2 | ||||
| -rw-r--r-- | lib/utils/reset/fdt_reset_atcwdt200.c | 22 |
2 files changed, 6 insertions, 18 deletions
diff --git a/lib/utils/reset/Kconfig b/lib/utils/reset/Kconfig index 68e66716..4835921f 100644 --- a/lib/utils/reset/Kconfig +++ b/lib/utils/reset/Kconfig @@ -11,7 +11,7 @@ if FDT_RESET config FDT_RESET_ATCWDT200 bool "Andes WDT FDT reset driver" - depends on SYS_ATCSMU + depends on FDT_HSM_ANDES_ATCSMU default n config FDT_RESET_GPIO diff --git a/lib/utils/reset/fdt_reset_atcwdt200.c b/lib/utils/reset/fdt_reset_atcwdt200.c index 2304582a..5dad8ac9 100644 --- a/lib/utils/reset/fdt_reset_atcwdt200.c +++ b/lib/utils/reset/fdt_reset_atcwdt200.c @@ -1,10 +1,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (c) 2022 Andes Technology Corporation - * - * Authors: - * Yu Chien Peter Lin <peterlin@andestech.com> + * Copyright (c) 2025 Andes Technology Corporation */ #include <libfdt.h> @@ -15,7 +12,7 @@ #include <sbi/sbi_system.h> #include <sbi_utils/fdt/fdt_driver.h> #include <sbi_utils/fdt/fdt_helper.h> -#include <sbi_utils/sys/atcsmu.h> +#include <sbi_utils/hsm/fdt_hsm_andes_atcsmu.h> #define ATCWDT200_WP_NUM 0x5aa5 #define WREN_REG 0x18 @@ -41,8 +38,9 @@ #define CLK_PCLK (1 << 1) #define WDT_EN (1 << 0) +#define AE350_FLASH_BASE 0x80000000 + static volatile char *wdt_addr = NULL; -static struct smu_data smu = { 0 }; static int ae350_system_reset_check(u32 type, u32 reason) { @@ -59,7 +57,7 @@ static int ae350_system_reset_check(u32 type, u32 reason) static void ae350_system_reset(u32 type, u32 reason) { sbi_for_each_hartindex(i) - if (smu_set_reset_vector(&smu, FLASH_BASE, i)) + if (atcsmu_set_reset_vector(AE350_FLASH_BASE, i)) goto fail; /* Program WDT control register */ @@ -88,16 +86,6 @@ static int atcwdt200_reset_init(const void *fdt, int nodeoff, return SBI_ENODEV; wdt_addr = (volatile char *)(unsigned long)reg_addr; - - /* - * The reset device requires smu to program the reset - * vector for each hart. - */ - if (fdt_parse_compat_addr(fdt, ®_addr, "andestech,atcsmu")) - return SBI_ENODEV; - - smu.addr = (unsigned long)reg_addr; - sbi_system_reset_add_device(&atcwdt200_reset); return 0; |