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| author | Radim Krčmář <rkrcmar@ventanamicro.com> | 2025-04-29 16:25:45 +0200 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2025-04-30 10:14:26 +0530 |
| commit | 009f77a9f06bcb5a3a6252b3333171adb8c84512 (patch) | |
| tree | b4c09454bdc1f7a264f382b864eab96987bc09b6 /lib/utils/cppc | |
| parent | 65e8be4fe85e0e4410026a86256682a314ddf173 (diff) | |
| download | opensbi-009f77a9f06bcb5a3a6252b3333171adb8c84512.zip opensbi-009f77a9f06bcb5a3a6252b3333171adb8c84512.tar.gz opensbi-009f77a9f06bcb5a3a6252b3333171adb8c84512.tar.bz2 | |
lib: sbi_hart: reset hstatus
hstatus.HU must be cleared, because U-mode could otherwise use the
HLS/HSV instructions. This would allow U-mode to read physical memory
directly if vgatp and vsatp was 0.
The remaining fields don't seem like a security vulnerability now, but
clearing the whole CSR is not an issue, so do that be safe.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Link: https://lore.kernel.org/r/20250429142549.3673976-5-rkrcmar@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'lib/utils/cppc')
0 files changed, 0 insertions, 0 deletions