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| author | Raj Vishwanathan <raj.vishwanathan@gmail.com> | 2025-02-11 13:46:39 -0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2025-02-12 09:14:43 +0530 |
| commit | 4f12f8b02f669e7cd3286a543f2cb6308fe5a0fe (patch) | |
| tree | 9472319ec5c4e31171473d2f353de057cc1f4475 /lib/utils/cppc/fdt_cppc_rpmi.c | |
| parent | 3f25380d85df0c8b8f188d23d0f80a560b416fb3 (diff) | |
| download | opensbi-4f12f8b02f669e7cd3286a543f2cb6308fe5a0fe.zip opensbi-4f12f8b02f669e7cd3286a543f2cb6308fe5a0fe.tar.gz opensbi-4f12f8b02f669e7cd3286a543f2cb6308fe5a0fe.tar.bz2 | |
include: sbi: Align SBI trap registers to a nice boundary
Align SBI_TRAP_CONTEXT_SIZE to a multiple of 16 bytes. If it is not
aligned to 16 bytes for RV64, it can create performance problems.
Aligning it correctly can fix the performance issues.
Signed-off-by: Raj Vishwanathan <Raj.Vishwanathan@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'lib/utils/cppc/fdt_cppc_rpmi.c')
0 files changed, 0 insertions, 0 deletions