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authorAnup Patel <apatel@ventanamicro.com>2023-12-11 14:07:56 +0530
committerAnup Patel <anup@brainfault.org>2023-12-19 15:56:37 +0530
commitcdebae2cc9539e2e0553b9c68eab22997c734cbb (patch)
tree3a0c68c8935b8381ba36da2eb60eaf7e350d2da1 /include
parent80169b25f8a9a7cb8becceff9a414900919527c6 (diff)
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lib: utils/irqchip: Add shared MMIO region for PLIC in root domain
On platforms with Smepmp, the MMIO regions accessed by M-mode need to be explicitly marked with M-mode only read/write or shared (both (M-mode and S-mode) read/write permission. If the above is not done then runtime PLIC access from M-mode on platforms with Smepmp will result in access fault when further results in CPU hotplug not working. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Diffstat (limited to 'include')
-rw-r--r--include/sbi_utils/irqchip/plic.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 112a714..2eda631 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -14,6 +14,7 @@
struct plic_data {
unsigned long addr;
+ unsigned long size;
unsigned long num_src;
};