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| author | Anup Patel <anup.patel@wdc.com> | 2018-12-24 16:49:01 +0530 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2018-12-26 11:14:22 +0530 |
| commit | b5ae8e8a650d8cb0134f03f53472fb026d2ee6e6 (patch) | |
| tree | 807e81429152b2375cd4169ca8d8f95e625273d3 /include | |
| parent | 96f66f79ca022eb4b591d319675b5ee0854ca45f (diff) | |
| download | opensbi-b5ae8e8a650d8cb0134f03f53472fb026d2ee6e6.zip opensbi-b5ae8e8a650d8cb0134f03f53472fb026d2ee6e6.tar.gz opensbi-b5ae8e8a650d8cb0134f03f53472fb026d2ee6e6.tar.bz2 | |
lib: Add misaligned load/store trap handling
We generally don't get misaligned load/store traps from Linux/U-Boot
compiled using GCC 8.2 or higher but this is not true with older
GCC toolchains. To tackle this we add misaligned load/store trap
handling adopted from BBL sources but much more simpler.
(Note: BBL sources can be found at https://github.com/riscv/riscv-pk.git)
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/sbi/sbi_misaligned_ldst.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/include/sbi/sbi_misaligned_ldst.h b/include/sbi/sbi_misaligned_ldst.h new file mode 100644 index 0000000..1641958 --- /dev/null +++ b/include/sbi/sbi_misaligned_ldst.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2018 Western Digital Corporation or its affiliates. + * + * Authors: + * Anup Patel <anup.patel@wdc.com> + * + * SPDX-License-Identifier: BSD-2-Clause + */ + +#ifndef __SBI_MISALIGNED_LDST_H__ +#define __SBI_MISALIGNED_LDST_H__ + +#include <sbi/sbi_types.h> + +struct sbi_trap_regs; +struct sbi_scratch; + +int sbi_misaligned_load_handler(u32 hartid, ulong mcause, + struct sbi_trap_regs *regs, + struct sbi_scratch *scratch); + +int sbi_misaligned_store_handler(u32 hartid, ulong mcause, + struct sbi_trap_regs *regs, + struct sbi_scratch *scratch); + +#endif |