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| author | Yu Chien Peter Lin <peterlin@andestech.com> | 2023-11-30 20:42:02 +0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2023-12-06 17:30:01 +0530 |
| commit | a48f2cfd94d3be641b2b17eb3fa9090bed2d6cb8 (patch) | |
| tree | 99422c4201161509f27b01fbf9b9a59ad4cfbb12 /include | |
| parent | 090fa99d7cf519a8b7d2685ae9f84a2fbe46b083 (diff) | |
| download | opensbi-a48f2cfd94d3be641b2b17eb3fa9090bed2d6cb8.zip opensbi-a48f2cfd94d3be641b2b17eb3fa9090bed2d6cb8.tar.gz opensbi-a48f2cfd94d3be641b2b17eb3fa9090bed2d6cb8.tar.bz2 | |
sbi: sbi_pmu: Add hw_counter_filter_mode() to pmu device
Add support for custom PMU extensions to set inhibit bits
on custom CSRs by introducing the PMU device callback
hw_counter_filter_mode(). This allows the perf tool to
restrict event counting under a specified privileged
mode by appending a modifier, e.g. perf record -e event:k
to count events only happening in kernel mode.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/sbi/sbi_pmu.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h index 16f6877..d63149c 100644 --- a/include/sbi/sbi_pmu.h +++ b/include/sbi/sbi_pmu.h @@ -89,6 +89,12 @@ struct sbi_pmu_device { * Custom function returning the machine-specific irq-bit. */ int (*hw_counter_irq_bit)(void); + + /** + * Custom function to inhibit counting of events while in + * specified mode. + */ + void (*hw_counter_filter_mode)(unsigned long flags, int counter_index); }; /** Get the PMU platform device */ |