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authorAnup Patel <apatel@ventanamicro.com>2024-09-23 14:32:23 +0530
committerAnup Patel <anup@brainfault.org>2024-10-25 23:00:15 +0530
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tree896a53d00b5a102a538af162e71b5e00cb2258b7
parentf609fd85846ac35e2780df50ba0ad801622e13d8 (diff)
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docs: Remove hartindex_to_context_table from domain_support.md
The hartindex_to_context_table field is no longer part of sbi_domain so remove related documentation from domain_support.md. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
-rw-r--r--docs/domain_support.md2
1 files changed, 0 insertions, 2 deletions
diff --git a/docs/domain_support.md b/docs/domain_support.md
index 1a40068..93186c4 100644
--- a/docs/domain_support.md
+++ b/docs/domain_support.md
@@ -41,7 +41,6 @@ has following details:
* **name** - Name of this domain
* **assigned_harts** - HARTs assigned to this domain
* **possible_harts** - HARTs possible in this domain
-* **hartindex_to_context_table** - Contexts corresponding to possible HARTs
* **regions** - Array of memory regions terminated by a memory region
with order zero
* **boot_hartid** - HART id of the HART booting this domain. The domain
@@ -81,7 +80,6 @@ following manner:
platform support
* **possible_harts** - All valid HARTs of a RISC-V platform are possible
HARTs of the ROOT domain
-* **hartindex_to_context_table** - Contexts corresponding to ROOT domain's possible HARTs
* **regions** - Two memory regions available to the ROOT domain:
**A)** A memory region to protect OpenSBI firmware from S-mode and U-mode
**B)** A memory region of **order=__riscv_xlen** allowing S-mode and