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| author | Clément Léger <cleger@rivosinc.com> | 2025-01-10 14:15:56 +0100 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2025-01-30 10:43:16 +0530 |
| commit | 5c7e2c8334325e9e1e2e0541863812146efacb0d (patch) | |
| tree | fdd25e50b2793b821d1108c63c061d4649ecf995 | |
| parent | ecab71e19a951a0e42dbbb81b0e4d43840551f7e (diff) | |
| download | opensbi-5c7e2c8334325e9e1e2e0541863812146efacb0d.zip opensbi-5c7e2c8334325e9e1e2e0541863812146efacb0d.tar.gz opensbi-5c7e2c8334325e9e1e2e0541863812146efacb0d.tar.bz2 | |
lib: sbi: pmu: add the PMU SSE event only if overflow IRQ is supported
Add the PMU SSE event only if an overflow irq bit is present.
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
| -rw-r--r-- | lib/sbi/sbi_pmu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c index 6e69a4d..40b898f 100644 --- a/lib/sbi/sbi_pmu.c +++ b/lib/sbi/sbi_pmu.c @@ -1165,7 +1165,8 @@ int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot) total_ctrs = num_hw_ctrs + SBI_PMU_FW_CTR_MAX; - sbi_sse_add_event(SBI_SSE_EVENT_LOCAL_PMU, &pmu_sse_cb_ops); + if (sbi_pmu_irq_bit() >= 0) + sbi_sse_add_event(SBI_SSE_EVENT_LOCAL_PMU, &pmu_sse_cb_ops); } phs = pmu_get_hart_state_ptr(scratch); |