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| author | Clément Léger <cleger@rivosinc.com> | 2024-10-18 10:40:07 +0200 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2024-10-25 23:59:27 +0530 |
| commit | 3bc86854ab5e26de580433cf67ed47bae148d777 (patch) | |
| tree | 9dbaeb220473b773f66223fe5ba554bcb5371483 | |
| parent | b2f77f5fa839ab8d55be295b5681848299c9e758 (diff) | |
| download | opensbi-3bc86854ab5e26de580433cf67ed47bae148d777.zip opensbi-3bc86854ab5e26de580433cf67ed47bae148d777.tar.gz opensbi-3bc86854ab5e26de580433cf67ed47bae148d777.tar.bz2 | |
lib: sbi: implement firmware feature SBI_FWFT_DOUBLE_TRAP
Add support for double trap firmware feature.
Link: https://lists.riscv.org/g/tech-prs/message/985 [1]
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
| -rw-r--r-- | include/sbi/riscv_encoding.h | 3 | ||||
| -rw-r--r-- | lib/sbi/sbi_fwft.c | 25 |
2 files changed, 27 insertions, 1 deletions
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h index fd34ba7..174cc9c 100644 --- a/include/sbi/riscv_encoding.h +++ b/include/sbi/riscv_encoding.h @@ -217,7 +217,8 @@ #define ENVCFG_ADUE_SHIFT 61 #define ENVCFG_ADUE (_ULL(1) << ENVCFG_ADUE_SHIFT) #define ENVCFG_CDE (_ULL(1) << 60) -#define ENVCFG_DTE (_ULL(1) << 59) +#define ENVCFG_DTE_SHIFT 59 +#define ENVCFG_DTE (_ULL(1) << ENVCFG_DTE_SHIFT) #define ENVCFG_PMM (_ULL(0x3) << 32) #define ENVCFG_PMM_PMLEN_0 (_ULL(0x0) << 32) #define ENVCFG_PMM_PMLEN_7 (_ULL(0x2) << 32) diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c index 9ee0d07..9cf14c1 100644 --- a/lib/sbi/sbi_fwft.c +++ b/lib/sbi/sbi_fwft.c @@ -137,6 +137,25 @@ static int fwft_get_misaligned_delegation(struct fwft_config *conf, return SBI_OK; } +static int fwft_double_trap_supported(struct fwft_config *conf) +{ + if (!sbi_hart_has_extension(sbi_scratch_thishart_ptr(), + SBI_HART_EXT_SSDBLTRP)) + return SBI_ENOTSUPP; + + return SBI_OK; +} + +static int fwft_set_double_trap(struct fwft_config *conf, unsigned long value) +{ + return fwft_menvcfg_set_bit(value, ENVCFG_DTE_SHIFT); +} + +static int fwft_get_double_trap(struct fwft_config *conf, unsigned long *value) +{ + return fwft_menvcfg_read_bit(value, ENVCFG_DTE_SHIFT); +} + static int fwft_adue_supported(struct fwft_config *conf) { if (!sbi_hart_has_extension(sbi_scratch_thishart_ptr(), @@ -350,6 +369,12 @@ static const struct fwft_feature features[] = .get = fwft_get_sstack, }, { + .id = SBI_FWFT_DOUBLE_TRAP, + .supported = fwft_double_trap_supported, + .set = fwft_set_double_trap, + .get = fwft_get_double_trap, + }, + { .id = SBI_FWFT_PTE_AD_HW_UPDATING, .supported = fwft_adue_supported, .set = fwft_set_adue, |