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| author | Radim Krčmář <rkrcmar@ventanamicro.com> | 2025-04-29 16:25:50 +0200 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2025-04-30 10:14:26 +0530 |
| commit | 316daaf1c299c29ac46e52145f65521f48ec63b5 (patch) | |
| tree | 7d34754a75edcd9cfa2b0a19c85940ae7debde8d | |
| parent | 937118ca6520c7d61af5d792917610a234bb6c3a (diff) | |
| download | opensbi-316daaf1c299c29ac46e52145f65521f48ec63b5.zip opensbi-316daaf1c299c29ac46e52145f65521f48ec63b5.tar.gz opensbi-316daaf1c299c29ac46e52145f65521f48ec63b5.tar.bz2 | |
lib: sbi_hart: properly reset Ssstateen
sstateen* and hstateen* CSRs must be zeroed by M-mode if the mstateen*
registers are missing, to avoid security issues.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Link: https://lore.kernel.org/r/20250429142549.3673976-10-rkrcmar@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
| -rw-r--r-- | lib/sbi/sbi_hart.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index 8dc61d6..fc4925b 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -114,12 +114,21 @@ static void mstatus_init(struct sbi_scratch *scratch) csr_write64(CSR_MSTATEEN1, SMSTATEEN_STATEN); csr_write64(CSR_MSTATEEN2, SMSTATEEN_STATEN); csr_write64(CSR_MSTATEEN3, SMSTATEEN_STATEN); + } - if (misa_extension('S')) + if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSSTATEEN)) { + if (misa_extension('S')) { csr_write(CSR_SSTATEEN0, 0); - - if (misa_extension('H')) + csr_write(CSR_SSTATEEN1, 0); + csr_write(CSR_SSTATEEN2, 0); + csr_write(CSR_SSTATEEN3, 0); + } + if (misa_extension('H')) { csr_write64(CSR_HSTATEEN0, (uint64_t)0); + csr_write64(CSR_HSTATEEN1, (uint64_t)0); + csr_write64(CSR_HSTATEEN2, (uint64_t)0); + csr_write64(CSR_HSTATEEN3, (uint64_t)0); + } } if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12) { |