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| author | Vladimir Kondratiev <vladimir.kondratiev@mobileye.com> | 2024-09-02 13:21:10 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2024-10-28 11:05:14 +0530 |
| commit | 1a2e507d2347500e6c994e005fb9725b2a9a8e8f (patch) | |
| tree | c126365a1447ee70165c50ece0d160dc68eb31f5 | |
| parent | 62447cd7aa17097cefdb0d7a2f1312ff55fcda27 (diff) | |
| download | opensbi-1a2e507d2347500e6c994e005fb9725b2a9a8e8f.zip opensbi-1a2e507d2347500e6c994e005fb9725b2a9a8e8f.tar.gz opensbi-1a2e507d2347500e6c994e005fb9725b2a9a8e8f.tar.bz2 | |
lib: sbi: fix number of PMP entries detection
CSR_PMPADDRn lower bits may read all-0 or all-1, depending on
the configuration. For TOR it is all-0, for NAPOT - all-1.
Thus if PMP entry was pre-configured as NAPOT, original code would
stop scanning because value read back not equal to the written one.
Mask lower bits before comparison to fix this
Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
| -rw-r--r-- | lib/sbi/sbi_hart.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index dc0863a..0451fcb 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -825,7 +825,7 @@ static int hart_detect_features(struct sbi_scratch *scratch) } else { \ csr_write_allowed(__csr, &trap, __wrval); \ if (!trap.cause) { \ - if (csr_swap(__csr, oldval) == __wrval) \ + if ((csr_swap(__csr, oldval) & __wrval) == __wrval) \ (hfeatures->__field)++; \ else \ goto __skip; \ |