Merge pull request #416 from davidharrishmc/master3.8.5

Renamed rv32e_unratified to rv32e_m because E extension was ratified …

121 files changed, 153 insertions, 0 deletions

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 8b3db96..01e6061 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -1,4 +1,9 @@
 # CHANGELOG
+
+## [3.8.5] -- 2013-12-23
+- Renamed rv32e_unratified to rv32e_m because the E extension has been ratified January 2023
+- Copied missing ebreak.S and ecall.S tests from rv32i_m/privilege to rv32e_m/privilege and update ISA for E
+
 ## [3.8.3] - 2023-11-30
 - Add Zicond ISA extension support
 
diff --git a/riscv-test-suite/rv32e_unratified/B/src/andn-01.S b/riscv-test-suite/rv32e_m/B/src/andn-01.S
index 4d37760..4d37760 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/andn-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/andn-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/bclr-01.S b/riscv-test-suite/rv32e_m/B/src/bclr-01.S
index 417eb14..417eb14 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/bclr-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/bclr-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/bclri-01.S b/riscv-test-suite/rv32e_m/B/src/bclri-01.S
index 475790b..475790b 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/bclri-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/bclri-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/bext-01.S b/riscv-test-suite/rv32e_m/B/src/bext-01.S
index 1936235..1936235 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/bext-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/bext-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/bexti-01.S b/riscv-test-suite/rv32e_m/B/src/bexti-01.S
index 6b17806..6b17806 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/bexti-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/bexti-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/binv-01.S b/riscv-test-suite/rv32e_m/B/src/binv-01.S
index 6f137fb..6f137fb 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/binv-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/binv-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/binvi-01.S b/riscv-test-suite/rv32e_m/B/src/binvi-01.S
index 6460401..6460401 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/binvi-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/binvi-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/bset-01.S b/riscv-test-suite/rv32e_m/B/src/bset-01.S
index 68c842a..68c842a 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/bset-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/bset-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/bseti-01.S b/riscv-test-suite/rv32e_m/B/src/bseti-01.S
index 80fbabc..80fbabc 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/bseti-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/bseti-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/clmul-01.S b/riscv-test-suite/rv32e_m/B/src/clmul-01.S
index 415b050..415b050 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/clmul-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/clmul-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/clmulh-01.S b/riscv-test-suite/rv32e_m/B/src/clmulh-01.S
index d1324ae..d1324ae 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/clmulh-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/clmulh-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/clmulr-01.S b/riscv-test-suite/rv32e_m/B/src/clmulr-01.S
index be00c78..be00c78 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/clmulr-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/clmulr-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/clz-01.S b/riscv-test-suite/rv32e_m/B/src/clz-01.S
index 96f1652..96f1652 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/clz-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/clz-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/cpop-01.S b/riscv-test-suite/rv32e_m/B/src/cpop-01.S
index ccd7082..ccd7082 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/cpop-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/cpop-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/ctz-01.S b/riscv-test-suite/rv32e_m/B/src/ctz-01.S
index 951a643..951a643 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/ctz-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/ctz-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/max-01.S b/riscv-test-suite/rv32e_m/B/src/max-01.S
index a945e03..a945e03 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/max-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/max-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/maxu-01.S b/riscv-test-suite/rv32e_m/B/src/maxu-01.S
index dc53ed1..dc53ed1 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/maxu-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/maxu-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/min-01.S b/riscv-test-suite/rv32e_m/B/src/min-01.S
index 4d73a5f..4d73a5f 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/min-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/min-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/minu-01.S b/riscv-test-suite/rv32e_m/B/src/minu-01.S
index 178da49..178da49 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/minu-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/minu-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/orcb_32-01.S b/riscv-test-suite/rv32e_m/B/src/orcb_32-01.S
index 489c6b7..489c6b7 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/orcb_32-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/orcb_32-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/orn-01.S b/riscv-test-suite/rv32e_m/B/src/orn-01.S
index 45e750d..45e750d 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/orn-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/orn-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/rev8_32-01.S b/riscv-test-suite/rv32e_m/B/src/rev8_32-01.S
index 5d135db..5d135db 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/rev8_32-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/rev8_32-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/rol-01.S b/riscv-test-suite/rv32e_m/B/src/rol-01.S
index e798ff6..e798ff6 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/rol-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/rol-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/ror-01.S b/riscv-test-suite/rv32e_m/B/src/ror-01.S
index 3ae4e2d..3ae4e2d 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/ror-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/ror-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/rori-01.S b/riscv-test-suite/rv32e_m/B/src/rori-01.S
index 35f5c90..35f5c90 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/rori-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/rori-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/sext.b-01.S b/riscv-test-suite/rv32e_m/B/src/sext.b-01.S
index 687ab23..687ab23 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/sext.b-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/sext.b-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/sext.h-01.S b/riscv-test-suite/rv32e_m/B/src/sext.h-01.S
index d1a85ac..d1a85ac 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/sext.h-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/sext.h-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/sh1add-01.S b/riscv-test-suite/rv32e_m/B/src/sh1add-01.S
index 3181631..3181631 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/sh1add-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/sh1add-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/sh2add-01.S b/riscv-test-suite/rv32e_m/B/src/sh2add-01.S
index 4422501..4422501 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/sh2add-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/sh2add-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/sh3add-01.S b/riscv-test-suite/rv32e_m/B/src/sh3add-01.S
index ae87681..ae87681 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/sh3add-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/sh3add-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/xnor-01.S b/riscv-test-suite/rv32e_m/B/src/xnor-01.S
index 16d8e7d..16d8e7d 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/xnor-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/xnor-01.S
diff --git a/riscv-test-suite/rv32e_unratified/B/src/zext.h_32-01.S b/riscv-test-suite/rv32e_m/B/src/zext.h_32-01.S
index 701fdd5..701fdd5 100644
--- a/riscv-test-suite/rv32e_unratified/B/src/zext.h_32-01.S
+++ b/riscv-test-suite/rv32e_m/B/src/zext.h_32-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cadd-01.S b/riscv-test-suite/rv32e_m/C/src/cadd-01.S
index d5211ca..d5211ca 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cadd-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cadd-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/caddi-01.S b/riscv-test-suite/rv32e_m/C/src/caddi-01.S
index 452ef15..452ef15 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/caddi-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/caddi-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/caddi16sp-01.S b/riscv-test-suite/rv32e_m/C/src/caddi16sp-01.S
index 71c13f4..71c13f4 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/caddi16sp-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/caddi16sp-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/caddi4spn-01.S b/riscv-test-suite/rv32e_m/C/src/caddi4spn-01.S
index 15272ac..15272ac 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/caddi4spn-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/caddi4spn-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cand-01.S b/riscv-test-suite/rv32e_m/C/src/cand-01.S
index 8bac08e..8bac08e 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cand-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cand-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/candi-01.S b/riscv-test-suite/rv32e_m/C/src/candi-01.S
index 7334475..7334475 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/candi-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/candi-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cbeqz-01.S b/riscv-test-suite/rv32e_m/C/src/cbeqz-01.S
index 75b7ce1..75b7ce1 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cbeqz-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cbeqz-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cbnez-01.S b/riscv-test-suite/rv32e_m/C/src/cbnez-01.S
index 1e5b324..1e5b324 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cbnez-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cbnez-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cj-01.S b/riscv-test-suite/rv32e_m/C/src/cj-01.S
index 8b9956a..8b9956a 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cj-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cj-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cjal-01.S b/riscv-test-suite/rv32e_m/C/src/cjal-01.S
index 353d1f9..353d1f9 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cjal-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cjal-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cjalr-01.S b/riscv-test-suite/rv32e_m/C/src/cjalr-01.S
index 5e91a7f..5e91a7f 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cjalr-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cjalr-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cjr-01.S b/riscv-test-suite/rv32e_m/C/src/cjr-01.S
index 1b459f8..1b459f8 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cjr-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cjr-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cli-01.S b/riscv-test-suite/rv32e_m/C/src/cli-01.S
index 3fbd56a..3fbd56a 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cli-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cli-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/clui-01.S b/riscv-test-suite/rv32e_m/C/src/clui-01.S
index ec7b79e..ec7b79e 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/clui-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/clui-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/clw-01.S b/riscv-test-suite/rv32e_m/C/src/clw-01.S
index b5f40ea..b5f40ea 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/clw-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/clw-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/clwsp-01.S b/riscv-test-suite/rv32e_m/C/src/clwsp-01.S
index b39c877..b39c877 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/clwsp-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/clwsp-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cmv-01.S b/riscv-test-suite/rv32e_m/C/src/cmv-01.S
index a7363e2..a7363e2 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cmv-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cmv-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cnop-01.S b/riscv-test-suite/rv32e_m/C/src/cnop-01.S
index 76a93de..76a93de 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cnop-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cnop-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cor-01.S b/riscv-test-suite/rv32e_m/C/src/cor-01.S
index 829f9c1..829f9c1 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cor-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cor-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cslli-01.S b/riscv-test-suite/rv32e_m/C/src/cslli-01.S
index ce22517..ce22517 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cslli-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cslli-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/csrai-01.S b/riscv-test-suite/rv32e_m/C/src/csrai-01.S
index 84fa552..84fa552 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/csrai-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/csrai-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/csrli-01.S b/riscv-test-suite/rv32e_m/C/src/csrli-01.S
index cccb3a9..cccb3a9 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/csrli-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/csrli-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/csub-01.S b/riscv-test-suite/rv32e_m/C/src/csub-01.S
index d7a4308..d7a4308 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/csub-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/csub-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/csw-01.S b/riscv-test-suite/rv32e_m/C/src/csw-01.S
index 7456bbf..7456bbf 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/csw-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/csw-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cswsp-01.S b/riscv-test-suite/rv32e_m/C/src/cswsp-01.S
index 4cd4848..4cd4848 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cswsp-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cswsp-01.S
diff --git a/riscv-test-suite/rv32e_unratified/C/src/cxor-01.S b/riscv-test-suite/rv32e_m/C/src/cxor-01.S
index edfd862..edfd862 100644
--- a/riscv-test-suite/rv32e_unratified/C/src/cxor-01.S
+++ b/riscv-test-suite/rv32e_m/C/src/cxor-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/add-01.S b/riscv-test-suite/rv32e_m/E/src/add-01.S
index 6d85ef7..6d85ef7 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/add-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/add-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/addi-01.S b/riscv-test-suite/rv32e_m/E/src/addi-01.S
index bb968ee..bb968ee 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/addi-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/addi-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/and-01.S b/riscv-test-suite/rv32e_m/E/src/and-01.S
index 581ea9e..581ea9e 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/and-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/and-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/andi-01.S b/riscv-test-suite/rv32e_m/E/src/andi-01.S
index 3a02191..3a02191 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/andi-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/andi-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/auipc-01.S b/riscv-test-suite/rv32e_m/E/src/auipc-01.S
index 393d96c..393d96c 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/auipc-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/auipc-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/beq-01.S b/riscv-test-suite/rv32e_m/E/src/beq-01.S
index 6076b27..6076b27 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/beq-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/beq-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/bge-01.S b/riscv-test-suite/rv32e_m/E/src/bge-01.S
index 7011a29..7011a29 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/bge-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/bge-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/bgeu-01.S b/riscv-test-suite/rv32e_m/E/src/bgeu-01.S
index 52663e5..52663e5 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/bgeu-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/bgeu-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/blt-01.S b/riscv-test-suite/rv32e_m/E/src/blt-01.S
index d3ee202..d3ee202 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/blt-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/blt-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/bltu-01.S b/riscv-test-suite/rv32e_m/E/src/bltu-01.S
index 00567eb..00567eb 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/bltu-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/bltu-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/bne-01.S b/riscv-test-suite/rv32e_m/E/src/bne-01.S
index 3a34d6c..3a34d6c 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/bne-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/bne-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/jal-01.S b/riscv-test-suite/rv32e_m/E/src/jal-01.S
index 349103b..349103b 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/jal-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/jal-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/jalr-01.S b/riscv-test-suite/rv32e_m/E/src/jalr-01.S
index 72f5bb4..72f5bb4 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/jalr-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/jalr-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/lb-align-01.S b/riscv-test-suite/rv32e_m/E/src/lb-align-01.S
index cbe73b0..cbe73b0 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/lb-align-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/lb-align-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/lbu-align-01.S b/riscv-test-suite/rv32e_m/E/src/lbu-align-01.S
index 9847b84..9847b84 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/lbu-align-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/lbu-align-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/lh-align-01.S b/riscv-test-suite/rv32e_m/E/src/lh-align-01.S
index 0df9efd..0df9efd 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/lh-align-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/lh-align-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/lhu-align-01.S b/riscv-test-suite/rv32e_m/E/src/lhu-align-01.S
index 9044009..9044009 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/lhu-align-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/lhu-align-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/lui-01.S b/riscv-test-suite/rv32e_m/E/src/lui-01.S
index d556640..d556640 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/lui-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/lui-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/lw-align-01.S b/riscv-test-suite/rv32e_m/E/src/lw-align-01.S
index 09e254c..09e254c 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/lw-align-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/lw-align-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/or-01.S b/riscv-test-suite/rv32e_m/E/src/or-01.S
index 7497711..7497711 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/or-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/or-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/ori-01.S b/riscv-test-suite/rv32e_m/E/src/ori-01.S
index 4e510ee..4e510ee 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/ori-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/ori-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/sb-align-01.S b/riscv-test-suite/rv32e_m/E/src/sb-align-01.S
index c56b994..c56b994 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/sb-align-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/sb-align-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/sh-align-01.S b/riscv-test-suite/rv32e_m/E/src/sh-align-01.S
index 337e9de..337e9de 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/sh-align-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/sh-align-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/sll-01.S b/riscv-test-suite/rv32e_m/E/src/sll-01.S
index af96926..af96926 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/sll-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/sll-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/slli-01.S b/riscv-test-suite/rv32e_m/E/src/slli-01.S
index 3c4730d..3c4730d 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/slli-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/slli-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/slt-01.S b/riscv-test-suite/rv32e_m/E/src/slt-01.S
index 028e1da..028e1da 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/slt-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/slt-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/slti-01.S b/riscv-test-suite/rv32e_m/E/src/slti-01.S
index 85c25d6..85c25d6 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/slti-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/slti-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/sltiu-01.S b/riscv-test-suite/rv32e_m/E/src/sltiu-01.S
index 93797fa..93797fa 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/sltiu-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/sltiu-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/sltu-01.S b/riscv-test-suite/rv32e_m/E/src/sltu-01.S
index fd83210..fd83210 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/sltu-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/sltu-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/sra-01.S b/riscv-test-suite/rv32e_m/E/src/sra-01.S
index 514e2ca..514e2ca 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/sra-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/sra-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/srai-01.S b/riscv-test-suite/rv32e_m/E/src/srai-01.S
index 08356fb..08356fb 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/srai-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/srai-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/srl-01.S b/riscv-test-suite/rv32e_m/E/src/srl-01.S
index 6d91dbc..6d91dbc 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/srl-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/srl-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/srli-01.S b/riscv-test-suite/rv32e_m/E/src/srli-01.S
index 9053bcf..9053bcf 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/srli-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/srli-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/sub-01.S b/riscv-test-suite/rv32e_m/E/src/sub-01.S
index d1f13f7..d1f13f7 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/sub-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/sub-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/sw-align-01.S b/riscv-test-suite/rv32e_m/E/src/sw-align-01.S
index 6d592e5..6d592e5 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/sw-align-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/sw-align-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/xor-01.S b/riscv-test-suite/rv32e_m/E/src/xor-01.S
index ecebd2d..ecebd2d 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/xor-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/xor-01.S
diff --git a/riscv-test-suite/rv32e_unratified/E/src/xori-01.S b/riscv-test-suite/rv32e_m/E/src/xori-01.S
index 38a7101..38a7101 100644
--- a/riscv-test-suite/rv32e_unratified/E/src/xori-01.S
+++ b/riscv-test-suite/rv32e_m/E/src/xori-01.S
diff --git a/riscv-test-suite/rv32e_unratified/M/src/div-01.S b/riscv-test-suite/rv32e_m/M/src/div-01.S
index b5a3bb6..b5a3bb6 100644
--- a/riscv-test-suite/rv32e_unratified/M/src/div-01.S
+++ b/riscv-test-suite/rv32e_m/M/src/div-01.S
diff --git a/riscv-test-suite/rv32e_unratified/M/src/divu-01.S b/riscv-test-suite/rv32e_m/M/src/divu-01.S
index 20932ed..20932ed 100644
--- a/riscv-test-suite/rv32e_unratified/M/src/divu-01.S
+++ b/riscv-test-suite/rv32e_m/M/src/divu-01.S
diff --git a/riscv-test-suite/rv32e_unratified/M/src/mul-01.S b/riscv-test-suite/rv32e_m/M/src/mul-01.S
index 56ffc3b..56ffc3b 100644
--- a/riscv-test-suite/rv32e_unratified/M/src/mul-01.S
+++ b/riscv-test-suite/rv32e_m/M/src/mul-01.S
diff --git a/riscv-test-suite/rv32e_unratified/M/src/mulh-01.S b/riscv-test-suite/rv32e_m/M/src/mulh-01.S
index 1805ad8..1805ad8 100644
--- a/riscv-test-suite/rv32e_unratified/M/src/mulh-01.S
+++ b/riscv-test-suite/rv32e_m/M/src/mulh-01.S
diff --git a/riscv-test-suite/rv32e_unratified/M/src/mulhsu-01.S b/riscv-test-suite/rv32e_m/M/src/mulhsu-01.S
index 7b6f909..7b6f909 100644
--- a/riscv-test-suite/rv32e_unratified/M/src/mulhsu-01.S
+++ b/riscv-test-suite/rv32e_m/M/src/mulhsu-01.S
diff --git a/riscv-test-suite/rv32e_unratified/M/src/mulhu-01.S b/riscv-test-suite/rv32e_m/M/src/mulhu-01.S
index dd1ab5d..dd1ab5d 100644
--- a/riscv-test-suite/rv32e_unratified/M/src/mulhu-01.S
+++ b/riscv-test-suite/rv32e_m/M/src/mulhu-01.S
diff --git a/riscv-test-suite/rv32e_unratified/M/src/rem-01.S b/riscv-test-suite/rv32e_m/M/src/rem-01.S
index 322c718..322c718 100644
--- a/riscv-test-suite/rv32e_unratified/M/src/rem-01.S
+++ b/riscv-test-suite/rv32e_m/M/src/rem-01.S
diff --git a/riscv-test-suite/rv32e_unratified/M/src/remu-01.S b/riscv-test-suite/rv32e_m/M/src/remu-01.S
index a541564..a541564 100644
--- a/riscv-test-suite/rv32e_unratified/M/src/remu-01.S
+++ b/riscv-test-suite/rv32e_m/M/src/remu-01.S
diff --git a/riscv-test-suite/rv32e_unratified/Zifencei/src/Fencei.S b/riscv-test-suite/rv32e_m/Zifencei/src/Fencei.S
index a9e4f3d..a9e4f3d 100644
--- a/riscv-test-suite/rv32e_unratified/Zifencei/src/Fencei.S
+++ b/riscv-test-suite/rv32e_m/Zifencei/src/Fencei.S
diff --git a/riscv-test-suite/rv32e_m/privilege/src/ebreak.S b/riscv-test-suite/rv32e_m/privilege/src/ebreak.S
new file mode 100644
index 0000000..b959a8b
--- /dev/null
+++ b/riscv-test-suite/rv32e_m/privilege/src/ebreak.S
@@ -0,0 +1,76 @@
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the ebreak instruction of the RISC-V I extension.
+// 
+
+#include "model_test.h"
+#include "arch_test.h"
+
+RVTEST_ISA("RV32E_Zicsr")
+
+# Test code region
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+#ifdef TEST_CASE_1
+    RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*E.*Zicsr.*); def rvtest_mtrap_routine=True; def RVTEST_E = True; def TEST_CASE_1=True",ebreak)
+    # ---------------------------------------------------------------------------------------------
+
+    LA(     x1,test_A_res)
+    
+    LI(     x2,0x11111111)
+    .option push;
+    .option norvc;
+    ebreak
+    nop
+    nop
+    sw      x0, 0(x1)
+    sw      x2, 4(x1)
+    .option pop;
+    
+    RVMODEL_IO_WRITE_STR(x14, "# Test part A - test EBREAK\n");
+
+    RVMODEL_IO_WRITE_STR(x14, "# Test End\n")
+
+#endif
+
+ # ---------------------------------------------------------------------------------------------
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+# Input data section.
+    .data
+    .align 4
+RVTEST_DATA_END
+
+# Output data section.
+RVMODEL_DATA_BEGIN
+rvtest_sig_begin:
+sig_begin_canary:
+CANARY;
+test_A_res:
+  .fill 2, 4, 0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+mtrap_sigptr:
+  .fill 4, 4, 0xdeadbeef
+#endif
+
+#ifdef rvtest_gpr_save
+gpr_save:
+  .fill 32*(XLEN/32), 4, 0xdeadbeef
+#endif
+
+sig_end_canary:
+CANARY;
+rvtest_sig_end:
+RVMODEL_DATA_END
diff --git a/riscv-test-suite/rv32e_m/privilege/src/ecall.S b/riscv-test-suite/rv32e_m/privilege/src/ecall.S
new file mode 100644
index 0000000..fabeeb6
--- /dev/null
+++ b/riscv-test-suite/rv32e_m/privilege/src/ecall.S
@@ -0,0 +1,72 @@
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the ecall instruction of the RISC-V I extension.
+// 
+
+#include "model_test.h"
+#include "arch_test.h"
+
+RVTEST_ISA("RV32E_Zicsr")
+
+# Test code region
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+    RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*E.*Zicsr.*); def rvtest_mtrap_routine=True; def RVTEST_E = True; def TEST_CASE_1=True",ecall)
+
+    # ---------------------------------------------------------------------------------------------
+    LA(     x1,test_A_res)
+    
+    LI(     x2,0x11111111)
+    ecall
+    nop
+    nop
+    sw      x0, 0(x1)
+    sw      x2, 4(x1)
+    
+    RVMODEL_IO_WRITE_STR(x14, "# Test part A - test ECALL\n");
+
+    RVMODEL_IO_WRITE_STR(x14, "# Test End\n")
+
+#endif
+
+ # ---------------------------------------------------------------------------------------------
+    # HALT
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+# Input data section.
+    .data
+    .align 4
+RVTEST_DATA_END
+
+# Output data section.
+RVMODEL_DATA_BEGIN
+rvtest_sig_begin:
+sig_begin_canary:
+CANARY;
+
+test_A_res:
+    .fill 2, 4, 0xdeadbeef
+
+mtrap_sigptr:
+  .fill 4, 4, 0xdeadbeef
+
+#ifdef rvtest_gpr_save
+gpr_save:
+  .fill 32*(XLEN/32), 4, 0xdeadbeef
+#endif
+
+sig_end_canary:
+CANARY;
+rvtest_sig_end:
+RVMODEL_DATA_END
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-beq-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign-beq-01.S
index d632ce0..d632ce0 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-beq-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign-beq-01.S
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-bge-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign-bge-01.S
index d443fcb..d443fcb 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-bge-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign-bge-01.S
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-bgeu-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign-bgeu-01.S
index 55419f8..55419f8 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-bgeu-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign-bgeu-01.S
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-blt-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign-blt-01.S
index 8764445..8764445 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-blt-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign-blt-01.S
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-bltu-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign-bltu-01.S
index bfe9d65..bfe9d65 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-bltu-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign-bltu-01.S
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-bne-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign-bne-01.S
index 7f23282..7f23282 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-bne-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign-bne-01.S
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-jal-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign-jal-01.S
index 47cf630..47cf630 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-jal-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign-jal-01.S
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-lh-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign-lh-01.S
index a0700df..a0700df 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-lh-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign-lh-01.S
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-lhu-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign-lhu-01.S
index b7b6fa6..b7b6fa6 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-lhu-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign-lhu-01.S
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-lw-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign-lw-01.S
index e805502..e805502 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-lw-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign-lw-01.S
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-sh-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign-sh-01.S
index 6acc1fd..6acc1fd 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-sh-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign-sh-01.S
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-sw-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign-sw-01.S
index 6a059c4..6a059c4 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign-sw-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign-sw-01.S
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign1-jalr-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign1-jalr-01.S
index 04c80f0..04c80f0 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign1-jalr-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign1-jalr-01.S
diff --git a/riscv-test-suite/rv32e_unratified/privilege/src/misalign2-jalr-01.S b/riscv-test-suite/rv32e_m/privilege/src/misalign2-jalr-01.S
index 5e6ca5f..5e6ca5f 100644
--- a/riscv-test-suite/rv32e_unratified/privilege/src/misalign2-jalr-01.S
+++ b/riscv-test-suite/rv32e_m/privilege/src/misalign2-jalr-01.S