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path: root/riscv/mmu.h
AgeCommit message (Expand)AuthorFilesLines
2022-06-03Simplify misaligned_load()trigger_priorityTim Newsome1-5/+3
2022-06-03Simplify handling of misaligned loads/storesAndrew Waterman1-48/+34
2022-06-03Make check_trigger_address_before() return void.Tim Newsome1-13/+10
2022-06-03Fix trigger store priority.Tim Newsome1-15/+25
2022-06-03Make templated store_fast() for use with store_func()Tim Newsome1-29/+39
2022-06-03Check for alignment in load_slow_path().Tim Newsome1-7/+10
2022-05-26Turn load_fast() from macro into templateTim Newsome1-31/+36
2022-05-26Check early for trigger address in fast load_func()Tim Newsome1-1/+8
2022-05-26Use `size` variable consistently.Tim Newsome1-8/+8
2022-05-26Check address for triggers before the access happens.Tim Newsome1-0/+16
2022-04-21Pass acutally_store from store_func to misaligned_storeRyan Buchner1-1/+1
2022-04-21Add actually_store tag to misaligned_store functionRyan Buchner1-2/+2
2022-04-21Modify store_func to throw fault if misaligned and require_alignment=trueRyan Buchner1-2/+4
2022-04-21Set require alignment to true on the 'fake' store in amo_func.Ryan Buchner1-1/+1
2022-04-21Add require_alignment tag to store_funcRyan Buchner1-1/+1
2022-04-13Adjust indentation in store_slow_path and store_funcRyan Buchner1-9/+9
2022-04-13Skip storing in store_func if actually_store is false, add a fake store at st...Ryan Buchner1-1/+6
2022-04-12Add actually_store tag to store_func and store_slow_pathRyan Buchner1-3/+3
2022-04-11Merge pull request #944 from riscv-software-src/triggersScott Johnson1-25/+15
2022-04-05Move trigger match logic into triggers.ccTim Newsome1-8/+10
2022-04-05module_t::trigger_match -> memory_access_matchTim Newsome1-2/+2
2022-04-05trigger_matched_t -> triggers::matched_tTim Newsome1-18/+5
2022-04-05Give triggers::module_t its own processor_t*Tim Newsome1-2/+2
2022-04-05Move trigger_match() into triggers.Tim Newsome1-2/+2
2022-03-30Replace state.mcontrol with TM.triggers.Tim Newsome1-1/+1
2022-03-30trigger_operation_t -> triggers::operation_tTim Newsome1-7/+8
2022-03-30Implement Sv57 and Sv57x4 translation modesAndrew Waterman1-0/+1
2022-01-30add instructions function for cmoliweiwei1-14/+36
2022-01-29add blocksz parameter to specify the cache block size for CBO operationsliweiwei1-0/+6
2021-09-08Make pmp_ok return type boolScott Johnson1-1/+1
2021-07-21Fix hypervisor MXR and SUMAndrew Waterman1-2/+2
2021-07-21Fix HLVX permissions checkAndrew Waterman1-5/+5
2021-07-21Simplify (and possibly fix) handling of HLV/HSV TLB accessesAndrew Waterman1-12/+4
2021-07-17ext-h: handle mis-aligned exception for guest worldChih-Min Chao1-16/+20
2021-06-12Revert the redundant check for lr instruction (#728)sven1-4/+1
2021-05-25Add alignment check for lr instruction (#713)sven1-1/+4
2021-03-02Fix AMO guest page fault as store guest fault (#663)francis40961-0/+3
2021-02-04Fix compile errorsAndrew Waterman1-4/+4
2021-01-20add support to page on demand (#634)Chih-Min Chao1-0/+3
2020-12-18If misaligned accesses are enabled, throw access fault on misaligned LR/SCAndrew Waterman1-2/+20
2020-12-18Check and use proc variable in MMU emulationAnup Patel1-2/+2
2020-11-27Fix hstatus.GVA and mstatus.GVA updationAnup Patel1-4/+4
2020-11-23Fix misaligned loads and stores for big endian target (#602)Marcus Comstedt1-2/+2
2020-11-12Correct AMO exception cause for misaligned accesses (#594)Scott Johnson1-0/+3
2020-11-11Use new require_alignment flag to simplify AMO checkScott Johnson1-3/+1
2020-11-11Make LR properly take misaligned exceptionScott Johnson1-4/+6
2020-11-07Make mmu_t::target_big_endian always availableMarcus Comstedt1-12/+2
2020-11-07Tag target endian values to help guide conversion codeMarcus Comstedt1-13/+13
2020-11-07Implement support for big-endian targetsMarcus Comstedt1-9/+48
2020-10-24Fix trap generation in s2xlate()Anup Patel1-1/+1
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