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-rw-r--r--riscv/processor.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/processor.h b/riscv/processor.h
index 3bdfb52..6b611d7 100644
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -109,6 +109,7 @@ struct state_t
csr_t_p stvec;
virtualized_csr_t_p satp;
csr_t_p scause;
+ csr_t_p scountinhibit;
// When taking a trap into HS-mode, we must access the nonvirtualized HS-mode CSRs directly:
csr_t_p nonvirtual_stvec;