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| author | YenHaoChen <howard25336284@gmail.com> | 2024-07-18 14:04:12 +0800 |
|---|---|---|
| committer | YenHaoChen <howard25336284@gmail.com> | 2024-07-06 03:30:41 +0800 |
| commit | f47782cf9e8aaa956e880d86776416a23ce60c83 (patch) | |
| tree | 83cdbce53faacaeec3e9f5188d06daecd85adbaa /riscv/mmu.cc | |
| parent | 37d06eb8ba7d15c853112f7aa2d4dc69992f1508 (diff) | |
| download | spike-f47782cf9e8aaa956e880d86776416a23ce60c83.zip spike-f47782cf9e8aaa956e880d86776416a23ce60c83.tar.gz spike-f47782cf9e8aaa956e880d86776416a23ce60c83.tar.bz2 | |
refactor: Rename parameter addr to original_addr in load_slow_path()
Diffstat (limited to 'riscv/mmu.cc')
| -rw-r--r-- | riscv/mmu.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/riscv/mmu.cc b/riscv/mmu.cc index 11f5832..2e7741f 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -223,9 +223,9 @@ void mmu_t::load_slow_path_intrapage(reg_t len, uint8_t* bytes, mem_access_info_ } } -void mmu_t::load_slow_path(reg_t addr, reg_t len, uint8_t* bytes, xlate_flags_t xlate_flags) +void mmu_t::load_slow_path(reg_t original_addr, reg_t len, uint8_t* bytes, xlate_flags_t xlate_flags) { - auto access_info = generate_access_info(addr, LOAD, xlate_flags); + auto access_info = generate_access_info(original_addr, LOAD, xlate_flags); reg_t transformed_addr = access_info.transformed_vaddr; check_triggers(triggers::OPERATION_LOAD, transformed_addr, access_info.effective_virt); |