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| author | YenHaoChen <howard25336284@gmail.com> | 2024-05-24 09:12:18 +0800 |
|---|---|---|
| committer | YenHaoChen <howard25336284@gmail.com> | 2024-05-24 09:12:21 +0800 |
| commit | 8ad1b68911c2b0c74bc8f00cf7f0f37bceca186e (patch) | |
| tree | 9d145659674e1f18481010e714ce48aabe1fafbf /riscv-disasm.pc.in | |
| parent | 2cfd5393520c0673fd0182fcca430351d9e6682d (diff) | |
| download | spike-8ad1b68911c2b0c74bc8f00cf7f0f37bceca186e.zip spike-8ad1b68911c2b0c74bc8f00cf7f0f37bceca186e.tar.gz spike-8ad1b68911c2b0c74bc8f00cf7f0f37bceca186e.tar.bz2 | |
vector: Not logging write of reduction instructions when vl = 0
The spec says: "If vl=0, no operation is performed and the destination
register is not updated." in Section 14. Vector Reduction Operations.
The commit proposes setting the variable is_write to false when vl = 0,
which means not logging the write.
Diffstat (limited to 'riscv-disasm.pc.in')
0 files changed, 0 insertions, 0 deletions