Remove all --varch parsing

9 files changed, 1 insertions, 93 deletions

diff --git a/.github/workflows/debug-smoke.yml b/.github/workflows/debug-smoke.yml
index 090e4d9..6ecc5fb 100644
--- a/.github/workflows/debug-smoke.yml
+++ b/.github/workflows/debug-smoke.yml
@@ -47,7 +47,7 @@ jobs:
         run: |
           git clone --recurse-submodules https://github.com/riscv-software-src/riscv-tests.git
           cd riscv-tests
-          git checkout bd0a19c136927eaa3b7296a591a896c141affb6b
+          git checkout 00ab5f0dd4cf56b5a0551bc5adedf60c765d0c66
 
       - name: Run Tests
         run: |
diff --git a/config.h.in b/config.h.in
index 95514fd..aef3596 100644
--- a/config.h.in
+++ b/config.h.in
@@ -12,9 +12,6 @@
 /* Default value for --priv switch */
 #undef DEFAULT_PRIV
 
-/* Default value for --varch switch */
-#undef DEFAULT_VARCH
-
 /* Define if subproject MCPPBS_SPROJ_NORM is enabled */
 #undef DISASM_ENABLED
 
diff --git a/configure b/configure
index 8095688..4ad998a 100755
--- a/configure
+++ b/configure
@@ -739,7 +739,6 @@ with_boost_asio
 with_boost_regex
 with_isa
 with_priv
-with_varch
 with_target
 enable_dual_endian
 '
@@ -1407,8 +1406,6 @@ Optional Packages:
   --with-isa=RV64IMAFDC_zicntr_zihpm
                           Sets the default RISC-V ISA
   --with-priv=MSU         Sets the default RISC-V privilege modes supported
-  --with-varch=vlen:128,elen:64
-                          Sets the default vector config
   --with-target=riscv64-unknown-elf
                           Sets the default target config
 
@@ -6593,20 +6590,6 @@ fi
 
 
 
-# Check whether --with-varch was given.
-if test ${with_varch+y}
-then :
-  withval=$with_varch;
-printf "%s\n" "#define DEFAULT_VARCH \"$withval\"" >>confdefs.h
-
-else $as_nop
-
-printf "%s\n" "#define DEFAULT_VARCH \"vlen:128,elen:64\"" >>confdefs.h
-
-fi
-
-
-
 # Check whether --with-target was given.
 if test ${with_target+y}
 then :
diff --git a/riscv/cfg.cc b/riscv/cfg.cc
index d105eb5..67dfdb4 100644
--- a/riscv/cfg.cc
+++ b/riscv/cfg.cc
@@ -35,7 +35,6 @@ cfg_t::cfg_t()
   bootargs         = nullptr;
   isa              = DEFAULT_ISA;
   priv             = DEFAULT_PRIV;
-  varch            = DEFAULT_VARCH;
   misaligned       = false;
   endianness       = endianness_little;
   pmpregions       = 16;
diff --git a/riscv/cfg.h b/riscv/cfg.h
index 63465e6..c972f03 100644
--- a/riscv/cfg.h
+++ b/riscv/cfg.h
@@ -67,7 +67,6 @@ public:
   const char *            bootargs;
   const char *            isa;
   const char *            priv;
-  const char *            varch;
   bool                    misaligned;
   endianness_t            endianness;
   reg_t                   pmpregions;
diff --git a/riscv/processor.cc b/riscv/processor.cc
index 516618d..9498b8f 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -105,11 +105,6 @@ static void bad_option_string(const char *option, const char *value,
   abort();
 }
 
-static void bad_varch_string(const char* varch, const char *msg)
-{
-  bad_option_string("--varch", varch, msg);
-}
-
 static std::string get_string_token(std::string str, const char delimiter, size_t& pos)
 {
   size_t _pos = pos;
@@ -117,17 +112,6 @@ static std::string get_string_token(std::string str, const char delimiter, size_
   return str.substr(_pos, pos - _pos);
 }
 
-static int get_int_token(std::string str, const char delimiter, size_t& pos)
-{
-  size_t _pos = pos;
-  while (pos < str.length() && str[pos] != delimiter) {
-    if (!isdigit(str[pos]))
-      bad_varch_string(str.c_str(), "Unsupported value"); // An integer is expected
-    ++pos;
-  }
-  return (pos == _pos) ? 0 : stoi(str.substr(_pos, pos - _pos));
-}
-
 static bool check_pow2(int val)
 {
   return ((val & (val - 1))) == 0;
@@ -141,51 +125,6 @@ static std::string strtolower(const char* str)
   return res;
 }
 
-void processor_t::parse_varch_string(const char* s)
-{
-  std::string str = strtolower(s);
-  size_t pos = 0;
-  size_t len = str.length();
-  int vlen = 0;
-  int elen = 0;
-  int vstart_alu = 0;
-
-  while (pos < len) {
-    std::string attr = get_string_token(str, ':', pos);
-
-    ++pos;
-
-    if (attr == "vlen")
-      vlen = get_int_token(str, ',', pos);
-    else if (attr == "elen")
-      elen = get_int_token(str, ',', pos);
-    else if (attr == "vstartalu")
-      vstart_alu = get_int_token(str, ',', pos);
-    else
-      bad_varch_string(s, "Unsupported token");
-
-    ++pos;
-  }
-
-  // The integer should be the power of 2
-  if (!check_pow2(vlen) || !check_pow2(elen)) {
-    bad_varch_string(s, "The integer value should be the power of 2");
-  }
-
-  /* Vector spec requirements. */
-  if (vlen < elen)
-    bad_varch_string(s, "vlen must be >= elen");
-
-  /* spike requirements. */
-  if (vlen > 4096)
-    bad_varch_string(s, "vlen must be <= 4096");
-
-  VU.VLEN = vlen;
-  VU.ELEN = elen;
-  VU.vlenb = vlen / 8;
-  VU.vstart_alu = vstart_alu;
-}
-
 static int xlen_to_uxl(int xlen)
 {
   if (xlen == 32)
diff --git a/riscv/processor.h b/riscv/processor.h
index 1f11393..14b828c 100644
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -410,7 +410,6 @@ private:
   friend class plic_t;
   friend class extension_t;
 
-  void parse_varch_string(const char*);
   void parse_priv_string(const char*);
   void build_opcode_map();
   void register_base_instructions();
diff --git a/riscv/riscv.ac b/riscv/riscv.ac
index 5785f27..378fd10 100644
--- a/riscv/riscv.ac
+++ b/riscv/riscv.ac
@@ -20,12 +20,6 @@ AC_ARG_WITH(priv,
   AC_DEFINE_UNQUOTED([DEFAULT_PRIV], "$withval", [Default value for --priv switch]),
   AC_DEFINE_UNQUOTED([DEFAULT_PRIV], "MSU", [Default value for --priv switch]))
 
-AC_ARG_WITH(varch,
-	[AS_HELP_STRING([--with-varch=vlen:128,elen:64],
-		[Sets the default vector config])],
-  AC_DEFINE_UNQUOTED([DEFAULT_VARCH], "$withval", [Default value for --varch switch]),
-  AC_DEFINE([DEFAULT_VARCH], ["vlen:128,elen:64"], [Default value for --varch switch]))
-
 AC_ARG_WITH(target,
 	[AS_HELP_STRING([--with-target=riscv64-unknown-elf],
 		[Sets the default target config])],
diff --git a/spike_main/spike.cc b/spike_main/spike.cc
index 6596bc1..1a298f2 100644
--- a/spike_main/spike.cc
+++ b/spike_main/spike.cc
@@ -45,7 +45,6 @@ static void help(int exit_code = 1)
   fprintf(stderr, "  --pmpregions=<n>      Number of PMP regions [default 16]\n");
   fprintf(stderr, "  --pmpgranularity=<n>  PMP Granularity in bytes [default 4]\n");
   fprintf(stderr, "  --priv=<m|mu|msu>     RISC-V privilege modes supported [default %s]\n", DEFAULT_PRIV);
-  fprintf(stderr, "  --varch=<name>        RISC-V Vector uArch string [default %s]\n", DEFAULT_VARCH);
   fprintf(stderr, "  --pc=<address>        Override ELF entry point\n");
   fprintf(stderr, "  --hartids=<a,b,...>   Explicitly specify hartids, default is 0,1,...\n");
   fprintf(stderr, "  --ic=<S>:<W>:<B>      Instantiate a cache model with S sets,\n");
@@ -404,7 +403,6 @@ int main(int argc, char** argv)
   parser.option(0, "pmpregions", 1, [&](const char* s){cfg.pmpregions = atoul_safe(s);});
   parser.option(0, "pmpgranularity", 1, [&](const char* s){cfg.pmpgranularity = atoul_safe(s);});
   parser.option(0, "priv", 1, [&](const char* s){cfg.priv = s;});
-  parser.option(0, "varch", 1, [&](const char* s){cfg.varch = s;});
   parser.option(0, "device", 1, device_parser);
   parser.option(0, "extension", 1, [&](const char* s){extensions.push_back(find_extension(s));});
   parser.option(0, "dump-dts", 0, [&](const char UNUSED *s){dump_dts = true;});