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authorChih-Min Chao <chihmin.chao@sifive.com>2019-10-29 03:43:49 -0700
committerChih-Min Chao <chihmin.chao@sifive.com>2019-11-11 19:02:35 -0800
commit4ea09d92bdfcb2f3e9110cd21f4533d2aacc80ba (patch)
treeb1fad0f919521e410650031c091078879a3f5c05
parent32be2f9bc5b46cf4fed0ba2b850ca53fa64bdb8f (diff)
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rvv: add 'V' ext check for each vector insn
'require_vector' should appear in front of each instruction and this trigger illegal exception when V extension isn't supported. Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
-rw-r--r--riscv/decode.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/decode.h b/riscv/decode.h
index e19dffa..a756607 100644
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -207,7 +207,7 @@ private:
#define require_accelerator require((STATE.mstatus & MSTATUS_XS) != 0)
#define require_vector_vs do { } while (0) // TODO MSTATUS_VS
-#define require_vector do { require_vector_vs; require(!P.VU.vill); } while (0)
+#define require_vector do { require_vector_vs; require_extension('V'); require(!P.VU.vill); } while (0)
#define require_vector_for_vsetvl do { require_vector_vs; require_extension('V'); } while (0)
#define set_fp_exceptions ({ if (softfloat_exceptionFlags) { \