ast27x0: Initialize and enable SSP/TSP using SCU with reserved-memory from DTB

This commit adds support for bringing up the SSP and TSP co-processors
on AST2700. The initialization and control logic are performed via SCU
register programming. Memory layout for firmware regions is retrieved
from reserved-memory nodes in the SPL device tree.

Features included:

- Add find_fmc_image() to locate FMC v2 image and extract payload range.
- Load and validate SPL DTB located after FMC payload.
- Parse reserved-memory nodes for SSP, TSP, ATF, OP-TEE, and IPC regions.
- Define struct mem_region and reserved_mem_info for memory layout data.
- Implement ssp_init() and ssp_enable() for SSP SCU setup and launch.
- Implement tsp_init() and tsp_enable() for TSP SCU setup and launch.
- Extend load_other_fit_images() to detect "sspfw" and "tspfw" images.
- Enable SSP/TSP after loading firmware from FIT image.
- Add SCU register definitions in struct ast2700_scu0.

Note: DTB is only used to retrieve memory layout for reserved regions.
The SSP and TSP initialization and activation are done via SCU registers.

Code adapted from:
https://github.com/AspeedTech-BMC/u-boot/blob/aspeed-master-v2023.10/board/aspeed/ibex_ast2700/ssp_tsp.c

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>

1 files changed, 8 insertions, 0 deletions

diff --git a/ast27x0/include/io.h b/ast27x0/include/io.h
index fab6546..6813940 100644
--- a/ast27x0/include/io.h
+++ b/ast27x0/include/io.h
@@ -27,4 +27,12 @@
 #define writel(value, addr) (*(volatile unsigned int *)(addr) = (unsigned int)(value))
 #define writeq(value, addr) (*(volatile unsigned long long *)(addr) = (unsigned long long)(value))
 
+#define BITS_PER_LONG (sizeof(unsigned long) * 8)
+#define GENMASK(h, l) \
+    (((~0UL) >> (BITS_PER_LONG - ((h) - (l) + 1))) << (l))
+
+#define BIT(x) (1UL << (x))
+
+#define ALIGN_UP(x, align)  (((x) + ((align) - 1)) & ~((align) - 1))
+
 #endif /* __AST27X0_INCLUDE_IO_H__ */