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AgeCommit message (Expand)AuthorFilesLines
2023-07-12psi: Remove PSIHB_XIVR referenceJoel Stanley1-2/+0
2021-08-06hw/psi-p10: Configure interrupt offset before notify addrOliver O'Halloran1-10/+10
2021-08-06psi/p10: Mask all sources at initCédric Le Goater1-0/+7
2021-08-06psi/p10: Introduce xive2_source_mask()Cédric Le Goater1-1/+10
2021-08-06psi/p10: Activate StoreEOICédric Le Goater1-1/+14
2021-08-06psi/p10: Activate 64K ESB pagesCédric Le Goater1-3/+4
2021-08-06xive/p10: Add a XIVE2 driverCédric Le Goater1-3/+22
2021-08-06psi/p10: Activate P10 interruptsCédric Le Goater1-1/+63
2020-11-27psi/p9: mask all sources at initCédric Le Goater1-0/+13
2020-08-07hw/psi-p9: Configure IRQ offset before XIVE notifyOliver O'Halloran1-10/+10
2020-05-26PSI: Convert prerror to PR_NOTICEVasant Hegde1-1/+1
2020-03-12Re-license IBM written files as Apache 2.0 OR GPLv2+Stewart Smith1-1/+1
2019-12-16add more sparse endian annotationsNicholas Piggin1-1/+1
2019-12-16cpu: use dt accessor device tree accessNicholas Piggin1-4/+4
2019-11-11Remove dead POWER7 codeNicholas Piggin1-1/+2
2019-09-06hw/psi: Remove explicit external IRQ policyOliver O'Halloran1-8/+6
2019-09-06hw/psi-p9: Mask OPAL-owned LSIs without handlersOliver O'Halloran1-6/+29
2019-09-06hw/psi-p9: Make interrupt name array globalOliver O'Halloran1-19/+19
2019-09-06hw/psi: Add chip ID to interrupt namesOliver O'Halloran1-23/+33
2019-07-26SPDX-ify all skiboot codeStewart Smith1-16/+4
2019-06-24Separate FSP specific PSI codeStewart Smith1-85/+9
2019-06-04Remove POWER7 and POWER7+ supportStewart Smith1-103/+2
2019-05-15Add P9 DIO interrupt supportLei YU1-0/+2
2019-01-25Remove POWER9N DD1 supportNicholas Piggin1-37/+6
2018-06-27occ: Move occ declarations into occ.hAndrew Donnellan1-0/+1
2018-06-18psi: Properly mask errors in SEMRJoel Stanley1-1/+1
2018-04-30Add SBE driver supportVasant Hegde1-1/+1
2018-04-11interrupts: Create an "interrupts" property in the OPAL nodeBenjamin Herrenschmidt1-3/+3
2017-06-26Big log level reduction...Benjamin Herrenschmidt1-2/+2
2017-06-26psi: Switch to ESB mode laterBenjamin Herrenschmidt1-4/+4
2017-06-26psi: Use phys_map to setup the BARsBenjamin Herrenschmidt1-31/+21
2017-06-19Ensure P9 DD1 workarounds apply only to NimbusMichael Neuling1-10/+11
2017-06-08SBE: Add passthrough command supportVasant Hegde1-1/+2
2017-04-12occ/irq: Fix SCOM address and irq reasons for P9 OCCShilpasri G Bhat1-2/+2
2017-03-03lpc/uart: Support routing of selected LPC interrupts to LinuxBenjamin Herrenschmidt1-8/+16
2017-02-07xive/psi/lpc: Handle proper clearing of LPC SerIRQ latch on DD1Benjamin Herrenschmidt1-3/+38
2017-01-05psi: Add names for PSI interruptsBenjamin Herrenschmidt1-0/+48
2016-12-21tree-wide: use dt_add_property_u64s() where we canOliver O'Halloran1-1/+1
2016-12-16psi: fix the xive registers initialization on P8Cédric Le Goater1-12/+8
2016-11-15xive: Provide a way to override some IPI sourcesBenjamin Herrenschmidt1-3/+3
2016-11-15psi: Fix P9 BAR setup on multi-chipsBenjamin Herrenschmidt1-2/+4
2016-11-15psi: Add DT option to disable LPC interruptsBenjamin Herrenschmidt1-1/+22
2016-10-17Fast reboot for P8Benjamin Herrenschmidt1-60/+43
2016-08-11psi: On p9, create an interrupt-map for routing PSI interruptsBenjamin Herrenschmidt1-0/+15
2016-08-11psi: Ensure chip_id is always set properlyBenjamin Herrenschmidt1-14/+10
2016-08-11psi: Remove psi->workingBenjamin Herrenschmidt1-13/+1
2016-08-11lpc: Add P9 LPC interrupts supportBenjamin Herrenschmidt1-1/+1
2016-08-11psi: Add P9 supportBenjamin Herrenschmidt1-147/+278
2016-08-11interrupts: Add new source ->attributes callbackBenjamin Herrenschmidt1-24/+27
2016-07-13interrupts: Expose irq_source and change prototypes of all opsBenjamin Herrenschmidt1-14/+15
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