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Diffstat (limited to 'doc/nvlink.rst')
-rw-r--r-- | doc/nvlink.rst | 22 |
1 files changed, 17 insertions, 5 deletions
diff --git a/doc/nvlink.rst b/doc/nvlink.rst index d035968..cba64df 100644 --- a/doc/nvlink.rst +++ b/doc/nvlink.rst @@ -38,14 +38,15 @@ related to the setup of DMA windows. Configuration Space Parameters ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -============ =============== ===== -============ =============== ===== -Vendor ID 0x1014 (IBM) +============ =================== ===== +============ =================== ===== +Vendor ID 0x1014 (IBM) Device ID 0x04ea Revision ID 0x00 -Class 0x068000 (Bridge Device Other, ProgIf = 0x0) +Class 0x068000 / 0x068001 (Bridge Device Other, ProgIf = 0x0 / 0x1) BAR0/1 TL/DL Registers -============ =============== ===== +BAR2/3 GEN-ID Registers (Only for rev-id = 0x1) +============ =================== ===== TL/DL Registers ^^^^^^^^^^^^^^^ @@ -59,6 +60,17 @@ to 64-bit BAR#0 of the emulated PCI device configuration space. :: | DL (64K) | BAR#0 +-----------+ +Generation Registers (GEN-ID) +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +On POWER9 each link has 64K of generation ID registers for the relaxed +ordering mode syncronisation. Refer to the programming guide for +details of the register layout in this BAR. + +Relaxed ordering mode will be disabled by default as it requires +device driver support. Device drivers will need to request relaxed +ordering mode through some yet to be designed mechanism. + Vendor Specific Capabilities ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ :: |