diff options
-rw-r--r-- | core/pci-opal.c | 26 | ||||
-rw-r--r-- | include/opal.h | 30 | ||||
-rw-r--r-- | include/pci.h | 3 |
3 files changed, 57 insertions, 2 deletions
diff --git a/core/pci-opal.c b/core/pci-opal.c index ee534cc..fdeba33 100644 --- a/core/pci-opal.c +++ b/core/pci-opal.c @@ -93,6 +93,32 @@ static int64_t opal_pci_eeh_freeze_clear(uint64_t phb_id, uint64_t pe_number, } opal_call(OPAL_PCI_EEH_FREEZE_CLEAR, opal_pci_eeh_freeze_clear, 3); +static int64_t opal_pci_err_injct(uint64_t phb_id, uint32_t pe_no, + uint32_t type, uint32_t function, + uint64_t addr, uint64_t mask) +{ + struct phb *phb = pci_get_phb(phb_id); + int64_t rc; + + if (!phb) + return OPAL_PARAMETER; + if (!phb->ops || !phb->ops->err_injct) + return OPAL_UNSUPPORTED; + + if (type != OpalErrinjctTypeIoaBusError && + type != OpalErrinjctTypeIoaBusError64) + return OPAL_PARAMETER; + + phb->ops->lock(phb); + rc = phb->ops->err_injct(phb, pe_no, type, + function, addr, mask); + phb->ops->unlock(phb); + pci_put_phb(phb); + + return rc; +} +opal_call(OPAL_PCI_ERR_INJCT, opal_pci_err_injct, 6); + static int64_t opal_pci_phb_mmio_enable(uint64_t phb_id, uint16_t window_type, uint16_t window_num, uint16_t enable) { diff --git a/include/opal.h b/include/opal.h index 5aa62e2..592f139 100644 --- a/include/opal.h +++ b/include/opal.h @@ -131,7 +131,8 @@ #define OPAL_PCI_SET_PHB_CAPI_MODE 93 #define OPAL_DUMP_INFO2 94 #define OPAL_WRITE_OPPANEL_ASYNC 95 -#define OPAL_LAST 95 +#define OPAL_PCI_ERR_INJCT 96 +#define OPAL_LAST 96 #ifndef __ASSEMBLY__ @@ -177,6 +178,33 @@ enum OpalPciErrorSeverity { OPAL_EEH_SEV_INF = 5 }; +enum OpalErrinjctType { + OpalErrinjctTypeIoaBusError = 0, + OpalErrinjctTypeIoaBusError64 = 1, + + /* IoaBusError & IoaBusError64 */ + OpalEjtIoaLoadMemAddr = 0, + OpalEjtIoaLoadMemData = 1, + OpalEjtIoaLoadIoAddr = 2, + OpalEjtIoaLoadIoData = 3, + OpalEjtIoaLoadConfigAddr = 4, + OpalEjtIoaLoadConfigData = 5, + OpalEjtIoaStoreMemAddr = 6, + OpalEjtIoaStoreMemData = 7, + OpalEjtIoaStoreIoAddr = 8, + OpalEjtIoaStoreIoData = 9, + OpalEjtIoaStoreConfigAddr = 10, + OpalEjtIoaStoreConfigData = 11, + OpalEjtIoaDmaReadMemAddr = 12, + OpalEjtIoaDmaReadMemData = 13, + OpalEjtIoaDmaReadMemMaster = 14, + OpalEjtIoaDmaReadMemTarget = 15, + OpalEjtIoaDmaWriteMemAddr = 16, + OpalEjtIoaDmaWriteMemData = 17, + OpalEjtIoaDmaWriteMemMaster = 18, + OpalEjtIoaDmaWriteMemTarget = 19, +}; + enum OpalShpcAction { OPAL_SHPC_GET_LINK_STATE = 0, OPAL_SHPC_GET_SLOT_STATE = 1 diff --git a/include/pci.h b/include/pci.h index 984bd38..e5af3ab 100644 --- a/include/pci.h +++ b/include/pci.h @@ -252,7 +252,8 @@ struct phb_ops { uint64_t *phb_status); int64_t (*eeh_freeze_clear)(struct phb *phb, uint64_t pe_number, uint64_t eeh_action_token); - + int64_t (*err_injct)(struct phb *phb, uint32_t pe_no, uint32_t type, + uint32_t function, uint64_t addr, uint64_t mask); int64_t (*get_diag_data)(struct phb *phb, void *diag_buffer, uint64_t diag_buffer_len); int64_t (*get_diag_data2)(struct phb *phb, void *diag_buffer, |