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authorRussell Currey <ruscur@russell.cc>2016-07-05 15:05:35 +1000
committerStewart Smith <stewart@linux.vnet.ibm.com>2016-07-20 18:14:47 +1000
commit62bf371705955b4e32da9f3d18897333a0a34869 (patch)
treebfddb5ef1a780c6a8787db4b154e8d3ac1825bac /platforms/astbmc/astbmc.h
parent8126e4c69407c1f9957ab2313015f46a30e1f1ec (diff)
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nvlink: Associate and allocate NPUs using slots
Allocating BDFNs to NPU devices and associating NPU devices with PCI devices of GPUs both rely on comparing PBCQ handles. This will fail if a system has multiple sets of GPUs behind a single PHB. Rework this to instead use slot locations. The following changes are introduced: - Groups of NPU links that connect to the same GPU are presented in the slot table entries as st_npu_slot, using ST_LOC_NPU_GROUP - NPU links are created with the ibm,npu-group-id property replacing the ibm,pbcq property, which is used in BDFN allocation and GPU association - Slot comparison is handled slightly differently for NPU devices as the function of the BDFN is ignored, since the device number represents the physical GPU the link is connected to - BDFN allocation for NPU devices is now derived from the groups in the slot table. For Garrison, the same BDFNs are generated as before. - Association with GPU PCI devices is performed by comparing the slot label. This means for future machines with NPUs that slot labels are compulsory to have NVLink functionality working. Signed-off-by: Russell Currey <ruscur@russell.cc> Reviewed-By: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'platforms/astbmc/astbmc.h')
-rw-r--r--platforms/astbmc/astbmc.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/platforms/astbmc/astbmc.h b/platforms/astbmc/astbmc.h
index 23c31c7..322282e 100644
--- a/platforms/astbmc/astbmc.h
+++ b/platforms/astbmc/astbmc.h
@@ -20,6 +20,13 @@
#define ST_LOC_PHB(chip_id, phb_idx) ((chip_id) << 16 | (phb_idx))
#define ST_LOC_DEVFN(dev, fn) ((dev) << 3 | (fn))
+/*
+ * NPU groups are used to allocate device numbers. There is a 1 to 1
+ * correlation between a NPU group and a physical GPU. Links within a group
+ * are allocated as functions within a device, so groups must be numbered
+ * sequentially starting at 0.
+ */
+#define ST_LOC_NPU_GROUP(group_id) (group_id << 3)
struct slot_table_entry {
enum slot_table_etype {
@@ -27,6 +34,7 @@ struct slot_table_entry {
st_phb,
st_pluggable_slot,
st_builtin_dev,
+ st_npu_slot
} etype;
uint32_t location;
const char *name;