STOP API: Changes for SMF and SPR self save

    Commit accomplishes following:
        -   Implementation of new self restore region memory layout
        -   Restore of SPRs pertaining to SMF
        -   Self save of SPRs
        -   Backward compatibility with old self restore layout
Key_Cronus_Test=PM_REGRESS

Change-Id: I11359e392102d32896251225907eb95a43ba6f78
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66212
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66216
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Signed-off-by: Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>

1 files changed, 53 insertions, 12 deletions

diff --git a/libpore/p9_stop_data_struct.H b/libpore/p9_stop_data_struct.H
index 940f405..1e9721e 100644
--- a/libpore/p9_stop_data_struct.H
+++ b/libpore/p9_stop_data_struct.H
@@ -63,8 +63,21 @@ namespace stopImageSection
 
 enum
 {
-    MAX_SPR_RESTORE_INST = 0x08,
-    SIZE_PER_SPR_RESTORE_INST = ((4 * sizeof(uint8_t)) / sizeof(uint32_t)),
+    MAX_SPR_RESTORE_INST        =   0x08,
+    SIZE_PER_SPR_RESTORE_INST   =   ((4 * sizeof(uint8_t)) / sizeof(uint32_t)),
+    MAX_THREAD_LEVEL_SPRS       =   11,
+    MAX_CORE_LEVEL_SPRS         =   6,
+    MAX_SPR_BIT_POS             =   31,
+    SPR_BIT_POS_8               =    8,
+    SPR_BIT_POS_19              =   19,
+    SPR_BIT_POS_25              =   25,
+    SPR_BIT_POS_27              =   27,
+};
+
+enum SprEntryUpdateMode
+{
+    INIT_SPR_REGION       =   0x01,
+    UPDATE_SPR_ENTRY      =   0x02,
 };
 
 typedef struct
@@ -79,8 +92,16 @@ typedef struct
  */
 typedef struct
 {
-    uint8_t threadArea[CORE_RESTORE_THREAD_AREA_SIZE];
-    uint8_t coreArea[CORE_RESTORE_CORE_AREA_SIZE];
+    uint8_t iv_threadRestoreArea[MAX_THREADS_PER_CORE][SMF_CORE_RESTORE_THREAD_AREA_SIZE];
+    uint8_t iv_threadSaveArea[MAX_THREADS_PER_CORE][SMF_SELF_SAVE_THREAD_AREA_SIZE];
+    uint8_t iv_coreRestoreArea[SMF_CORE_RESTORE_CORE_AREA_SIZE];
+    uint8_t iv_coreSaveArea[SMF_CORE_SAVE_CORE_AREA_SIZE];
+} SmfSprRestoreArea_t;
+
+typedef struct
+{
+    uint8_t iv_threadArea[CORE_RESTORE_THREAD_AREA_SIZE];
+    uint8_t iv_coreArea[CORE_RESTORE_CORE_AREA_SIZE];
 } SprRestoreArea_t;
 
 /**
@@ -90,13 +111,28 @@ typedef struct
  */
 typedef struct
 {
-    uint8_t occ_host_sgpe_area[ TWO_MB ];  // CPU restore area starts at an offset of 2MB from chip HOMER
-    uint8_t interrruptHandler[SELF_RESTORE_INT_SIZE];
-    uint8_t threadLauncher[THREAD_LAUNCHER_SIZE];
-    SprRestoreArea_t coreThreadRestore[MAX_CORES_PER_CHIP][MAX_THREADS_PER_CORE];
+    uint8_t iv_occ_host_sgpe_area[ TWO_MB ];  // CPU restore area starts at an offset of 2MB from chip HOMER
+    uint8_t iv_interrruptHandler[SELF_RESTORE_INT_SIZE];
+    uint8_t iv_threadLauncher[THREAD_LAUNCHER_SIZE];
+    SprRestoreArea_t iv_coreThreadRestore[MAX_CORES_PER_CHIP][MAX_THREADS_PER_CORE];
     uint8_t reserve[(ONE_KB * ONE_KB) - SELF_RESTORE_SIZE_TOTAL];
 } HomerSection_t;
 
+
+/**
+ * @brief   models homer image of a chip that supports SMF.
+ * @note    sections not relevant for CPU register restoration have been
+ * abstracted using field 'reserve'.
+ */
+typedef struct
+{
+    uint8_t iv_occ_host_sgpe_area[ TWO_MB ];
+    uint8_t iv_interrruptHandler[SELF_RESTORE_INT_SIZE];
+    uint8_t iv_threadLauncher[SMF_THREAD_LAUNCHER_SIZE];
+    SmfSprRestoreArea_t iv_coreThreadRestore[MAX_CORES_PER_CHIP];
+    uint8_t reserve[(ONE_KB * ONE_KB) - SMF_SELF_RESTORE_SIZE_TOTAL];
+} SmfHomerSection_t;
+
 /**
  * @brief models cache subsection in STOP section of a given homer image.
  * @note    given the start of cache subsection associated with a given core,
@@ -116,14 +152,19 @@ typedef struct
  */
 typedef struct
 {
-    uint32_t sprId;
-    bool isThreadScope;
+    uint32_t iv_sprId;
+    bool     iv_isThreadScope;
+    uint32_t iv_saveMaskPos;
+
 } StopSprReg_t;
 
 enum
 {
-    SIZE_SCOM_ENTRY = sizeof( ScomEntry_t ),
-    SCOM_ENTRY_START = 0xDEADDEAD,
+    SIZE_SCOM_ENTRY     =   sizeof( ScomEntry_t ),
+    SCOM_ENTRY_START    =   0xDEADDEAD,
+    BAD_SAVE_MASK       =   0x007FF000,
+    MAX_SPR_INDEX       =   31,
+    TEST_BIT_PATTERN    =   0x80000000,
 };
 
 #ifdef __FAPI_2_