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| author | Oliver O'Halloran <oohall@gmail.com> | 2018-04-10 17:29:20 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2018-04-11 17:59:57 -0500 |
| commit | f10feca2b3324270ca3de47aa98d99911cf85a7c (patch) | |
| tree | 73578b006e999b12ed81f9618199275c9522dc12 /include | |
| parent | 778d86bf9e5b9cf61986f6d316707771eed1d409 (diff) | |
| download | skiboot-f10feca2b3324270ca3de47aa98d99911cf85a7c.zip skiboot-f10feca2b3324270ca3de47aa98d99911cf85a7c.tar.gz skiboot-f10feca2b3324270ca3de47aa98d99911cf85a7c.tar.bz2 | |
phb4: Enable the PCIe slotcap on pluggable slots
Enables reporting of slot status information, etc in the config space of
the root complex. Currently this is only used to set the slot power
limit in our generic PCI code, but we might use it for other things
later on.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/phb4-regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/phb4-regs.h b/include/phb4-regs.h index 16a1a74..3f87ddc 100644 --- a/include/phb4-regs.h +++ b/include/phb4-regs.h @@ -267,6 +267,7 @@ // FIXME add more here #define PHB_PCIE_SCR 0x1A00 +#define PHB_PCIE_SCR_SLOT_CAP PPC_BIT(15) #define PHB_PCIE_SCR_MAXLINKSPEED PPC_BITMASK(32,35) |