diff options
| author | Christophe Lombard <clombard@linux.vnet.ibm.com> | 2017-09-04 16:01:51 +0200 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-09-04 20:45:35 -0500 |
| commit | e221d3522737cf6ee04349a40045b357c4404aba (patch) | |
| tree | 7c7e891bbc48369df4c7d9b2777b88641c05afbf /include | |
| parent | e6b5d60de0ec1d88854025c1dc433c1c2f694b29 (diff) | |
| download | skiboot-e221d3522737cf6ee04349a40045b357c4404aba.zip skiboot-e221d3522737cf6ee04349a40045b357c4404aba.tar.gz skiboot-e221d3522737cf6ee04349a40045b357c4404aba.tar.bz2 | |
capi: POWER9 DD2 update
The CAPI initialization sequence has been updated in DD2.
This patch adapts to the changes, retaining compatibility with DD1.
The patch includes some changes to DD1 fix-ups as well.
Tests performed on some of the old/new hardware.
Some CAPP registers are initialized through the initfile p9.cxa.scom as
the CAPP FIR, Transport Control and Snoop control registers.
The following features will be added soon:
- CAPP recovery.
- Credit setup for Non Blocking Write + force quiesce.
- Disable CAPI mode.
Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/phb4-regs.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/phb4-regs.h b/include/phb4-regs.h index 59c308e..e83c8c3 100644 --- a/include/phb4-regs.h +++ b/include/phb4-regs.h @@ -337,6 +337,9 @@ /* Nest base registers */ #define XPEC_NEST_PBCQ_HW_CONFIG 0x0 +#define XPEC_NEST_PBCQ_HW_CONFIG_PBINIT PPC_BIT(12) +#define XPEC_NEST_PBCQ_HW_CONFIG_CH_STR PPC_BIT(33) +#define XPEC_NEST_CAPP_CNTL 0x7 /* Nest base per-stack registers */ #define XPEC_NEST_STK_PCI_NFIR 0x0 @@ -365,6 +368,7 @@ #define XPEC_NEST_STK_BAR_EN_PHB PPC_BIT(2) #define XPEC_NEST_STK_BAR_EN_INT PPC_BIT(3) #define XPEC_NEST_STK_DATA_FREZ_TYPE 0x15 +#define XPEC_NEST_STK_TUNNEL_BAR 0x16 /* PCI base registers */ #define XPEC_PCI_PBAIB_HW_CONFIG 0x0 |