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author | Lei YU <mine260309@gmail.com> | 2019-01-18 10:30:06 +0800 |
---|---|---|
committer | Stewart Smith <stewart@linux.ibm.com> | 2019-05-15 16:22:23 +1000 |
commit | df34cedd050a966b334973c933e5e7e90164b6ec (patch) | |
tree | 83d1f14c732c36c10954b7055ba5697c5765c967 /include | |
parent | 32d44e3555218a7df92b56a411c271617dad77c4 (diff) | |
download | skiboot-df34cedd050a966b334973c933e5e7e90164b6ec.zip skiboot-df34cedd050a966b334973c933e5e7e90164b6ec.tar.gz skiboot-df34cedd050a966b334973c933e5e7e90164b6ec.tar.bz2 |
Add P9 DIO interrupt support
On P9 there are GPIO port 0, 1, 2 for GPIO interrupt, and DIO interrupt
is used to handle the interrupts.
Add support to the DIO interrupts:
1. Add dio_interrupt_register(chip, port, callback) to register the
interrupt;
2. Add dio_interrupt_deregister(chip, port, callback) to deregister;
3. When interrupt on the port occurs, callback is invoked, and the
interrupt status is cleared.
Signed-off-by: Lei YU <mine260309@gmail.com>
[oliver: Fixed Makefile.inc merge conflict]
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/chip.h | 4 | ||||
-rw-r--r-- | include/dio-p9.h | 50 | ||||
-rw-r--r-- | include/xscom-p9-regs.h | 5 |
3 files changed, 58 insertions, 1 deletions
diff --git a/include/chip.h b/include/chip.h index d6e7e35..5231d17 100644 --- a/include/chip.h +++ b/include/chip.h @@ -114,6 +114,7 @@ struct xive; struct lpcm; struct vas; struct p9_sbe; +struct p9_dio; /* Chip type */ enum proc_chip_type { @@ -224,6 +225,9 @@ struct proc_chip { /* Used by hw/sbe-p9.c */ struct p9_sbe *sbe; + + /* Used by hw/dio-p9.c */ + struct p9_dio *dio; }; extern uint32_t pir_to_chip_id(uint32_t pir); diff --git a/include/dio-p9.h b/include/dio-p9.h new file mode 100644 index 0000000..65aed2d --- /dev/null +++ b/include/dio-p9.h @@ -0,0 +1,50 @@ + +/* Copyright 2019 IBM Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + * implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __DIO_H +#define __DIO_H + +struct proc_chip; + +/* Initialize the P9 DIO */ +extern void p9_dio_init(void); + +/* The function typedef for dio interrupt callback */ +typedef void (*dio_interrupt_callback)(struct proc_chip *chip); + +/* Register dio interrupt on GPIO port. + * This effectively enables the DIO interrupt on the GPIO port, + * and callback will be called when the interrupt is triggered */ +extern int dio_interrupt_register(struct proc_chip *chip, + int port, dio_interrupt_callback c); + +/* Deregister dio interrupt on GPIO port. + * This effectively disables the DIO interrupt on the GPIO port. */ +extern int dio_interrupt_deregister(struct proc_chip *chip, + int port, dio_interrupt_callback c); + +/* The function to be called when DIO interrupt is triggered */ +extern void dio_interrupt_handler(uint32_t chip_id); + + +#define NUM_OF_P9_DIO_PORTS 3 /* P9 has GPIO port 0~2 for interrupts */ + +struct p9_dio { + dio_interrupt_callback callbacks[NUM_OF_P9_DIO_PORTS]; +}; + +#endif /* __DIO_H */ diff --git a/include/xscom-p9-regs.h b/include/xscom-p9-regs.h index 2c9dc6b..5137d91 100644 --- a/include/xscom-p9-regs.h +++ b/include/xscom-p9-regs.h @@ -58,8 +58,11 @@ #define P9X_EX_NCU_DARN_BAR 0x11011 #define P9X_EX_NCU_DARN_BAR_EN PPC_BIT(0) -#define P9_GPIO_DATA_OUT_ENABLE 0x00000000000B0054ull #define P9_GPIO_DATA_OUT 0x00000000000B0051ull +#define P9_GPIO_DATA_OUT_ENABLE 0x00000000000B0054ull +#define P9_GPIO_INTERRUPT_STATUS 0x00000000000B0057ull +#define P9_GPIO_INTERRUPT_ENABLE 0x00000000000B005Dull +#define P9_GPIO_INTERRUPT_CONDITION 0x00000000000B005Eull /* xscom address for SCOM Control and data Register */ /* bits 54:60 of SCOM SPRC register is used for core specific SPR selection. */ |