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| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2019-06-25 14:29:04 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2019-06-27 11:35:22 +1000 |
| commit | d2005818bea35e74b8991a615ac5bee389263126 (patch) | |
| tree | 31879c389fa27ad2b4eb6ed8f8acafa5fd961c26 /include | |
| parent | 6e049e3c4fc5a046fc50bc38a2ea0826b18a173c (diff) | |
| download | skiboot-d2005818bea35e74b8991a615ac5bee389263126.zip skiboot-d2005818bea35e74b8991a615ac5bee389263126.tar.gz skiboot-d2005818bea35e74b8991a615ac5bee389263126.tar.bz2 | |
npu2: Increase timeout for L2/L3 cache purging
On NVLink2 bridge reset, we purge all L2/L3 caches in the system.
This is an asynchronous operation, we have a 2ms timeout here. There are
reports that this is not enough and "PURGE L3 on core xxx timed out"
messages appear (for the reference: on the test setup this takes
280us..780us).
This defines the timeout as a macro and changes this from 2ms to 20ms.
This adds a tracepoint to tell how long it took to purge all the caches.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/npu2-regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/npu2-regs.h b/include/npu2-regs.h index 3cb587a..00a72e6 100644 --- a/include/npu2-regs.h +++ b/include/npu2-regs.h @@ -798,6 +798,8 @@ void npu2_scom_write(uint64_t gcid, uint64_t scom_base, #define L3_PRD_PURGE_TTYPE_MASK PPC_BIT(1) | PPC_BIT(2) | PPC_BIT(3) | PPC_BIT(4) #define L3_FULL_PURGE 0x0 +#define L2_L3_PRD_PURGE_TIMEOUT_MS 20 + /* Config registers for NPU2 */ #define NPU_STCK0_CS_SM0_MISC_CONFIG0 0x5011000 #define NPU_STCK0_CS_SM1_MISC_CONFIG0 0x5011030 |