diff options
| author | Ananth N Mavinakayanahalli <ananth@in.ibm.com> | 2015-11-06 15:10:44 +0530 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-11-12 16:05:23 +1100 |
| commit | 42d5d04758b4aa30e83e741a489f25592d4ad896 (patch) | |
| tree | f9209af79dff247250eecc7510a471b02071e18e /include | |
| parent | fff572c0bbad746c477d733fbde5280667d931f8 (diff) | |
| download | skiboot-42d5d04758b4aa30e83e741a489f25592d4ad896.zip skiboot-42d5d04758b4aa30e83e741a489f25592d4ad896.tar.gz skiboot-42d5d04758b4aa30e83e741a489f25592d4ad896.tar.bz2 | |
FSP: Handle DPO initiated CEC shutdown with FSP in RR
In a scenario where the DPO has been initiated, but the FSP then went into
reset before the CEC power down came in, OPAL may not give up the link since
it may never see the PSI interrupt. So, if we are in dpo_pending and an FSP
reset is detected via the DISR, give up the PSI link voluntarily.
Tested-by: Vipin K Parashar <vipin@linux.vnet.ibm.com>
Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/fsp.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/fsp.h b/include/fsp.h index 4e247cc..a61bd58 100644 --- a/include/fsp.h +++ b/include/fsp.h @@ -823,6 +823,7 @@ extern void fsp_epow_init(void); /* DPO */ extern void fsp_dpo_init(void); +extern bool fsp_dpo_pending; /* Chiptod */ extern void fsp_chiptod_init(void); |