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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2015-06-23 14:25:54 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-07-06 17:06:54 +1000 |
| commit | 348e4df0ecc750c41079b56329c0d58627121633 (patch) | |
| tree | 2dc4951d46a18e947aea66d4de3e22aded861cdd /include | |
| parent | 1576ba971a28578a67c71b78df130110a10cd2f7 (diff) | |
| download | skiboot-348e4df0ecc750c41079b56329c0d58627121633.zip skiboot-348e4df0ecc750c41079b56329c0d58627121633.tar.gz skiboot-348e4df0ecc750c41079b56329c0d58627121633.tar.bz2 | |
p8-i2c: Add support for Centaur i2c
The Centaur i2c differs from the main P8 one two ways:
- It doesn't have interrupts, we need to always use polling
- There is a sensor cache for use by the OCC that regularly generates
i2c transactions in HW on that bus. It needs to be disabled before we
can perform i2c accesses and re-enabled later.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/centaur.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/centaur.h b/include/centaur.h index 5412475..f515da7 100644 --- a/include/centaur.h +++ b/include/centaur.h @@ -31,6 +31,9 @@ struct centaur_chip { uint32_t scache_disable_count; bool scache_was_enabled; struct lock lock; + + /* Used by hw/p8-i2c.c */ + struct list_head i2cms; }; extern int64_t centaur_disable_sensor_cache(uint32_t part_id); |