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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2015-09-30 15:47:03 +1000
committerStewart Smith <stewart@linux.vnet.ibm.com>2015-10-01 11:03:52 +1000
commit0896e73b1a0ec72aad5c464b4fdb6a826b9a3160 (patch)
tree5ecdbfc605de7c3002688b0d298e5e6284e3d93e /include
parent902e1a67c3a245c7cd52d8bf6a53fdafe13afd6e (diff)
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centaur: Add indirect XSCOM support
It works just like P8, we copy the code for now rather than make it somewhat common due to our locking differences and to limit the risk close to release. We can refactor later. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include')
-rw-r--r--include/xscom.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/include/xscom.h b/include/xscom.h
index 6e47c0d..933af6a 100644
--- a/include/xscom.h
+++ b/include/xscom.h
@@ -154,6 +154,18 @@
#define EX_PM_IDLE_ST_HIST_PM_STATE_MASK PPC_BITMASK(0, 2)
#define EX_PM_IDLE_ST_HIST_PM_STATE_LSH PPC_BITLSHIFT(2)
+/* Definitions relating to indirect XSCOMs shared with centaur */
+#define XSCOM_ADDR_IND_FLAG PPC_BIT(0)
+#define XSCOM_ADDR_IND_ADDR PPC_BITMASK(12,31)
+#define XSCOM_ADDR_IND_DATA PPC_BITMASK(48,63)
+
+#define XSCOM_DATA_IND_READ PPC_BIT(0)
+#define XSCOM_DATA_IND_COMPLETE PPC_BIT(32)
+#define XSCOM_DATA_IND_ERR PPC_BITMASK(33,35)
+#define XSCOM_DATA_IND_DATA PPC_BITMASK(48,63)
+
+/* HB folks say: try 10 time for now */
+#define XSCOM_IND_MAX_RETRIES 10
/*
* Error handling: