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| author | Christophe Lombard <clombard@linux.vnet.ibm.com> | 2021-10-14 17:56:56 +0200 |
|---|---|---|
| committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-10-19 12:26:01 +0530 |
| commit | a7eae3eef52a3081f0f2188a10cd4dc1d7b8f1c1 (patch) | |
| tree | 3bdcbe071eca7f8e96e599f43da766c9e2b8f687 /include/xscom-p10-regs.h | |
| parent | ca9a2b8b315121c6c9d45ca98bc70c0bc8603beb (diff) | |
| download | skiboot-a7eae3eef52a3081f0f2188a10cd4dc1d7b8f1c1.zip skiboot-a7eae3eef52a3081f0f2188a10cd4dc1d7b8f1c1.tar.gz skiboot-a7eae3eef52a3081f0f2188a10cd4dc1d7b8f1c1.tar.bz2 | |
pau: translation layer configuration
Next main part of the hypervisor PAU initialization.
The P10 PAU supports two OpenCAPI links.
The PAU provides various configuration selections for both of the OCAPI
Link Transaction Layer functions (OTLs). These include a link enable,
behavior controls, debug modes, and virtual channel credits to send to
the AFU. The OTL Configuration 0, OTL Configuration 1, OTL
Configuration 2, and TLX Credit Configuration registers are used to
control these functions.
This patch completes the PAU configuration following the
sections 17.1.3.4 to 17.1.3.10.2 of the workbook document.
Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'include/xscom-p10-regs.h')
| -rw-r--r-- | include/xscom-p10-regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/xscom-p10-regs.h b/include/xscom-p10-regs.h index 6045152..21ac21f 100644 --- a/include/xscom-p10-regs.h +++ b/include/xscom-p10-regs.h @@ -53,4 +53,6 @@ #define P10_NCU_DARN_BAR_EN PPC_BIT(0) #define P10_NCU_DARN_BAR_ADDRMSK 0x000ffffffffff000ull /* 4k aligned */ +#define P10_ROOT_CONTROL_7 0x50017 + #endif /* __XSCOM_P10_REGS_H__ */ |