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| author | Michael Neuling <mikey@neuling.org> | 2016-11-16 16:49:23 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-11-24 16:29:12 +1100 |
| commit | e1aa93a53576f8cd433a764fc3e0242a54d7c8ae (patch) | |
| tree | 2e886530936925052b3cb8bfefc310669489f40f /include/phb4-regs.h | |
| parent | 3d88d1d7c77b739637caa757ae50b9287f9ef1bb (diff) | |
| download | skiboot-e1aa93a53576f8cd433a764fc3e0242a54d7c8ae.zip skiboot-e1aa93a53576f8cd433a764fc3e0242a54d7c8ae.tar.gz skiboot-e1aa93a53576f8cd433a764fc3e0242a54d7c8ae.tar.bz2 | |
phb4: Fix location of EEH enable bits
Fix some of the bit definitions.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/phb4-regs.h')
| -rw-r--r-- | include/phb4-regs.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/phb4-regs.h b/include/phb4-regs.h index 16f30f6..48953e4 100644 --- a/include/phb4-regs.h +++ b/include/phb4-regs.h @@ -125,7 +125,8 @@ #define PHB_CTRLR 0x810 #define PHB_CTRLR_IRQ_PGSZ_64K PPC_BIT(11) #define PHB_CTRLR_MMIO_RD_STRICT PPC_BIT(13) -#define PHB_CTRLR_CFG_EEH_DISABLE PPC_BIT(15) +#define PHB_CTRLR_MMIO_EEH_DISABLE PPC_BIT(14) +#define PHB_CTRLR_CFG_EEH_BLOCK PPC_BIT(15) #define PHB_CTRLR_FENCE_LNKILL_DIS PPC_BIT(16) #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17,19) #define TVT_1_PER_PE 0 |