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| author | Frederic Barrat <fbarrat@linux.ibm.com> | 2021-08-04 12:51:30 +0530 |
|---|---|---|
| committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-08-06 12:29:59 +0530 |
| commit | 6af8ac2e00cddcdbdf673b3ea3ead9453c5445ba (patch) | |
| tree | e1011336fa5366677757020eef267524f0029d5b /include/phb4-regs.h | |
| parent | c226e8bade288835fd78dad3f3751ae322819139 (diff) | |
| download | skiboot-6af8ac2e00cddcdbdf673b3ea3ead9453c5445ba.zip skiboot-6af8ac2e00cddcdbdf673b3ea3ead9453c5445ba.tar.gz skiboot-6af8ac2e00cddcdbdf673b3ea3ead9453c5445ba.tar.bz2 | |
phb5: Workaround for PCI bug HW551382
The workaround forces a state machine deep in the PHB to start from
scratch and to block its evolution until after the link has been
reset. It applies on all paths where the link can go down
unexpectedly, though it's probably useless on the creset path, since
we're going to deep-reset the PHB anyway. But it doesn't hurt and it
keeps the set/unset path symmetrical.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'include/phb4-regs.h')
| -rw-r--r-- | include/phb4-regs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/phb4-regs.h b/include/phb4-regs.h index 8ab78c3..85d2cf2 100644 --- a/include/phb4-regs.h +++ b/include/phb4-regs.h @@ -275,7 +275,7 @@ #define PHB_PCIE_DLP_DL_PGRESET PPC_BIT(22) #define PHB_PCIE_DLP_TRAINING PPC_BIT(20) #define PHB_PCIE_DLP_INBAND_PRESENCE PPC_BIT(19) - +#define PHB_PCIE_DLP_SYS_DISABLEDETECT PPC_BIT(12) #define PHB_PCIE_DLP_CTL 0x1A78 #define PHB_PCIE_DLP_CTL_BYPASS_PH2 PPC_BIT(4) #define PHB_PCIE_DLP_CTL_BYPASS_PH3 PPC_BIT(5) |