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author | Nicholas Piggin <npiggin@gmail.com> | 2019-01-16 13:58:40 +1000 |
---|---|---|
committer | Stewart Smith <stewart@linux.ibm.com> | 2019-01-25 13:57:05 -0600 |
commit | 0b0d15e3c1701fd98bc72b69ae9ba43699aef68d (patch) | |
tree | b9ae3aeef9e17ae29b70744bf1d5564c59bc5f6e /include/phb4-regs.h | |
parent | 3b4ae3a2e2a56e1166be9176445fe7fcdee1fca2 (diff) | |
download | skiboot-0b0d15e3c1701fd98bc72b69ae9ba43699aef68d.zip skiboot-0b0d15e3c1701fd98bc72b69ae9ba43699aef68d.tar.gz skiboot-0b0d15e3c1701fd98bc72b69ae9ba43699aef68d.tar.bz2 |
Remove POWER9N DD1 support
This is not a shipping product and is no longer supported by Linux
or other firmware components.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'include/phb4-regs.h')
-rw-r--r-- | include/phb4-regs.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/include/phb4-regs.h b/include/phb4-regs.h index 235c213..8dd8cdc 100644 --- a/include/phb4-regs.h +++ b/include/phb4-regs.h @@ -119,11 +119,6 @@ #define PHB_CTRLR_CFG_EEH_BLOCK PPC_BIT(15) #define PHB_CTRLR_FENCE_LNKILL_DIS PPC_BIT(16) #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17,19) -#define TVT_DD1_1_PER_PE 0 -#define TVT_DD1_2_PER_PE 1 -#define TVT_DD1_4_PER_PE 2 -#define TVT_DD1_8_PER_PE 3 -#define TVT_DD1_16_PER_PE 4 #define TVT_2_PER_PE 0 #define TVT_4_PER_PE 1 #define TVT_8_PER_PE 2 @@ -308,8 +303,6 @@ #define PHB_PCIE_LANE_EQ_CNTL3 0x1AE8 #define PHB_PCIE_LANE_EQ_CNTL20 0x1AF0 #define PHB_PCIE_LANE_EQ_CNTL21 0x1AF8 -#define PHB_PCIE_LANE_EQ_CNTL22 0x1B00 /* DD1 only */ -#define PHB_PCIE_LANE_EQ_CNTL23 0x1B08 /* DD1 only */ #define PHB_PCIE_TRACE_CTRL 0x1B20 #define PHB_PCIE_MISC_STRAP 0x1B30 |