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| author | Christophe Lombard <clombard@linux.vnet.ibm.com> | 2021-10-14 17:57:04 +0200 |
|---|---|---|
| committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-10-19 12:26:02 +0530 |
| commit | 4c1add1fb20fe07b827227ca34f63f176774d51c (patch) | |
| tree | 6f191cb95c848d7bbf2268231cc62f7d8719f0d0 /include/pau.h | |
| parent | 2d89dd334756d19a9ffc3e4c784406177f46c053 (diff) | |
| download | skiboot-4c1add1fb20fe07b827227ca34f63f176774d51c.zip skiboot-4c1add1fb20fe07b827227ca34f63f176774d51c.tar.gz skiboot-4c1add1fb20fe07b827227ca34f63f176774d51c.tar.bz2 | |
pau: Add support for OpenCAPI Persistent Memory devices.
Lowest Point of Coherency (LPC) memory allows the host to access memory on
an OpenCAPI device.
When the P10 chip accesses memory addresses on the AFU, the Real Address
on the PowerBus must hit a BAR in the PAU such as GPU-Memory BAR. The BAR
defines the range of Real Addresses that represent AFU memory.
The two existing OPAL calls, OPAL_NPU_MEM_ALLOC and OPAL_NPU_MEM_RELEASE
are used to manage the AFU momory.
Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'include/pau.h')
| -rw-r--r-- | include/pau.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/pau.h b/include/pau.h index a70058f..4a6087c 100644 --- a/include/pau.h +++ b/include/pau.h @@ -45,6 +45,7 @@ struct pau_dev { struct pau_bar ntl_bar; struct pau_bar genid_bar; + struct pau_bar memory_bar; /* Associated I2C information */ uint8_t i2c_bus_id; @@ -209,6 +210,9 @@ int64_t pau_opencapi_spa_clear_cache(struct phb *phb, uint64_t PE_handle); int64_t pau_opencapi_tl_set(struct phb *phb, uint32_t __unused bdfn, long capabilities, char *rate_buf); +int64_t pau_opencapi_mem_alloc(struct phb *phb, uint32_t __unused bdfn, + uint64_t size, uint64_t *bar); +int64_t pau_opencapi_mem_release(struct phb *phb, uint32_t __unused bdfn); /* PHY */ int pau_dev_phy_reset(struct pau_dev *dev); |