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| author | Christophe Lombard <clombard@linux.vnet.ibm.com> | 2021-10-14 17:56:53 +0200 |
|---|---|---|
| committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-10-19 12:26:01 +0530 |
| commit | 8baea29fdeaa5eab26c1ca6e3b88e18a3387be96 (patch) | |
| tree | 47cc663b979d4efa98ea7481e498d0dd74326c06 /include/cpu.h | |
| parent | faea2419754c0a455b6cf32a5fa58c72fa75083b (diff) | |
| download | skiboot-8baea29fdeaa5eab26c1ca6e3b88e18a3387be96.zip skiboot-8baea29fdeaa5eab26c1ca6e3b88e18a3387be96.tar.gz skiboot-8baea29fdeaa5eab26c1ca6e3b88e18a3387be96.tar.bz2 | |
pau: assign bars
Configure early PAU Global MMIO BAR registers to allow PAU MMIO
register accesses. This is done for each PAU. Enable the Powerbus
interface is mandatory for MMIO accesses.
For each OpenCAPI device, configure the bar registers to access to
the AFU MMIO and to the AFU Config Addr/Data registers.
AFU Config/Data registers = GENID_ADDR (from phy_map file) + 320K
(= 0x50000)
Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'include/cpu.h')
0 files changed, 0 insertions, 0 deletions