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author | Michael Neuling <mikey@neuling.org> | 2016-05-02 15:26:21 +1000 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-05-10 16:04:51 +1000 |
commit | 591feeef8353c8a0ee73e42ff1538cf436c5fd1d (patch) | |
tree | 224bfb9fbed30b06eede81bd82d0506d91f24bb3 /include/chip.h | |
parent | 3ff350343a67cd1897f37684613468a5f849ac1b (diff) | |
download | skiboot-591feeef8353c8a0ee73e42ff1538cf436c5fd1d.zip skiboot-591feeef8353c8a0ee73e42ff1538cf436c5fd1d.tar.gz skiboot-591feeef8353c8a0ee73e42ff1538cf436c5fd1d.tar.bz2 |
Add base POWER9 support
Add PVR detection, chip id and other misc bits for POWER9.
POWER9 changes the location of the HILE and attn enable bits in the
HID0 register, so add these definitions also.
Signed-off-by: Michael Neuling <mikey@neuling.org>
[stewart@linux.vnet.ibm.com: Fix Numbus typo, hdata_to_dt build fixes]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/chip.h')
-rw-r--r-- | include/chip.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/include/chip.h b/include/chip.h index 72b85df..3409419 100644 --- a/include/chip.h +++ b/include/chip.h @@ -77,6 +77,24 @@ #define P8_PIR2THREADID(pir) ((pir) & 0x7) +/* + * P9 GCID + * ------- + * + * Global chip ID is a 7 bit number: + * + * NodeID ChipID + * | | | + * |___|___|___|___|___|___|___| + * + * Bit 56 is unused according to the manual by we add it to the coreid here. + */ +#define P9_PIR2GCID(pir) (((pir) >> 8) & 0x7f) + +#define P9_PIR2COREID(pir) (((pir) >> 2) & 0x3f) + +#define P9_PIR2THREADID(pir) ((pir) & 0x3) + struct dt_node; struct centaur_chip; struct mfsi; @@ -89,6 +107,8 @@ enum proc_chip_type { PROC_CHIP_P8_MURANO, PROC_CHIP_P8_VENICE, PROC_CHIP_P8_NAPLES, + PROC_CHIP_P9_NIMBUS, + PROC_CHIP_P9_CUMULUS, }; /* Simulator quirks */ |