NX: Add NX coprocessor init opal call

The read offset (4:11) in Receive FIFO control register is incremented
by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
match with the corresponding entry in FIFO maintained by VAS in kernel.
VAS entry is reset to 0 when opening the receive window during driver
initialization. So when NX842 is reloaded or in kexec boot, possibility
of mismatch between RxFIFO control register and VAS entries in kernel.
It could cause CRB failure / timeout from NX.

This patch adds nx_coproc_init opal call for kernel to initialize
readOffset (4:11) and Queued (15:23) in RxFIFO control register.

Fixes: 3b3c5962f432 ("NX: Add P9 NX support for 842 compression engine")
CC: stable # v5.8+
Signed-off-by: Haren Myneni <haren@us.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/include/chip.h b/include/chip.h
index 059033e..2fb8126 100644
--- a/include/chip.h
+++ b/include/chip.h
@@ -217,6 +217,8 @@ struct proc_chip {
 
 	struct vas		*vas;
 
+	/* Used by hw/nx-compress.c */
+	uint64_t		nx_base;
 	/* location code of this chip */
 	const uint8_t		*loc_code;