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author | Cédric Le Goater <clg@kaod.org> | 2020-06-12 13:37:27 +0200 |
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committer | Oliver O'Halloran <oohall@gmail.com> | 2020-06-30 11:47:38 +1000 |
commit | 7eccd8dd1201138c1120d4d84d76f6de4b16ee34 (patch) | |
tree | 1e9f7a6b638138c96c0cfd3490aa984af65b0438 /hw | |
parent | 770cbf429d800106177dabaeb8e9d9db907b6f89 (diff) | |
download | skiboot-7eccd8dd1201138c1120d4d84d76f6de4b16ee34.zip skiboot-7eccd8dd1201138c1120d4d84d76f6de4b16ee34.tar.gz skiboot-7eccd8dd1201138c1120d4d84d76f6de4b16ee34.tar.bz2 |
xive/p9: Introduce XIVE_EQ_SHIFT
Each EQ descriptor is associated with a pair of ESB pages. The even
page controls the ESn PQ bits and the odd page controls the ESe PQ
bits.
Reviewed-by: Gustavo Romero <gromero@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/xive.c | 5 |
1 files changed, 3 insertions, 2 deletions
@@ -100,7 +100,6 @@ /* Use 64K for everything by default */ #define IC_PAGE_SIZE 0x10000 #define TM_PAGE_SIZE 0x10000 -#define EQ_ESB_SHIFT (16 + 1) /* VC BAR contains set translations for the ESBs and the EQs. * @@ -182,6 +181,8 @@ #define EQ_PER_PAGE (0x10000 / 32) // Use sizeof ? #define IND_EQ_TABLE_SIZE ((XIVE_EQ_COUNT / EQ_PER_PAGE) * 8) +#define XIVE_EQ_SHIFT (16 + 1) /* ESn + ESe pages */ + /* Number of priorities (and thus EQDs) we allocate for each VP */ #define NUM_INT_PRIORITIES 8 @@ -2676,7 +2677,7 @@ static struct xive *init_one_xive(struct dt_node *np) /* Register escalation sources */ __xive_register_source(x, &x->esc_irqs, MAKE_ESCALATION_GIRQ(x->block_id, 0), - XIVE_EQ_COUNT, EQ_ESB_SHIFT, + XIVE_EQ_COUNT, XIVE_EQ_SHIFT, x->eq_mmio, XIVE_SRC_EOI_PAGE1, false, NULL, NULL); |