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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-12-22 14:17:04 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-01-05 15:41:02 +1100 |
| commit | 51cba86cb6078585ee595be7c82a217ec3f8ef68 (patch) | |
| tree | bc23e4367b5ff12b7955f67759d3d3d9f9477b64 /hw | |
| parent | 9703d53d64c9e44378f46b16fe88a5f1cd3dd8e4 (diff) | |
| download | skiboot-51cba86cb6078585ee595be7c82a217ec3f8ef68.zip skiboot-51cba86cb6078585ee595be7c82a217ec3f8ef68.tar.gz skiboot-51cba86cb6078585ee595be7c82a217ec3f8ef68.tar.bz2 | |
xive: Fix memory barrier in opal_xive_get_xirr()
We can do the Ack cycle using a simple load but we need a sync
before we look at the EQs, otherwise we might be missing the
EQ update corresponding to a priority in the ACK cycle.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/xive.c | 5 |
1 files changed, 3 insertions, 2 deletions
@@ -3029,9 +3029,10 @@ static int64_t opal_xive_get_xirr(uint32_t *out_xirr, bool just_poll) /* Perform the HV Ack cycle */ if (just_poll) - ack = in_be64(xs->tm_ring1 + TM_QW3_HV_PHYS) >> 48; + ack = __in_be64(xs->tm_ring1 + TM_QW3_HV_PHYS) >> 48; else - ack = in_be16(xs->tm_ring1 + TM_SPC_ACK_HV_REG); + ack = __in_be16(xs->tm_ring1 + TM_SPC_ACK_HV_REG); + sync(); xive_cpu_vdbg(c, "get_xirr,%s=%04x\n", just_poll ? "POLL" : "ACK", ack); /* Capture the old CPPR which we will return with the interrupt */ |