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| author | Frederic Barrat <fbarrat@linux.ibm.com> | 2022-05-31 15:46:33 +0200 |
|---|---|---|
| committer | Reza Arbab <arbab@linux.ibm.com> | 2022-06-13 10:03:03 -0500 |
| commit | d9772c6108db42dc7b186cc699fe597d3f40c302 (patch) | |
| tree | e1e6e4009b5acadf87fa181259cc3672dde4dc45 /hw/xive2.c | |
| parent | 716de322fec27c362a8b30d512ad24238e656d34 (diff) | |
| download | skiboot-d9772c6108db42dc7b186cc699fe597d3f40c302.zip skiboot-d9772c6108db42dc7b186cc699fe597d3f40c302.tar.gz skiboot-d9772c6108db42dc7b186cc699fe597d3f40c302.tar.bz2 | |
xive: Fix NSR value when dumping the state of thread context
There's no reason to skip 2 bits when printing the Notification Source
Register (NSR) of any thread context ring. So it's got to be a silly
mistake and we should shift by 56 bits and not 58 :-)
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Dan Horák <dan@danny.cz>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
Diffstat (limited to 'hw/xive2.c')
| -rw-r--r-- | hw/xive2.c | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -4464,7 +4464,7 @@ static int64_t opal_xive_dump_tm(uint32_t offset, const char *n, uint32_t pir) " W2 W3\n", pir); prlog(PR_INFO, "CPU[%04x]: %02x %02x %02x %02x %02x " "%02x %02x %02x %08x %08x\n", pir, - (uint8_t)(v0 >> 58) & 0xff, (uint8_t)(v0 >> 48) & 0xff, + (uint8_t)(v0 >> 56) & 0xff, (uint8_t)(v0 >> 48) & 0xff, (uint8_t)(v0 >> 40) & 0xff, (uint8_t)(v0 >> 32) & 0xff, (uint8_t)(v0 >> 24) & 0xff, (uint8_t)(v0 >> 16) & 0xff, (uint8_t)(v0 >> 8) & 0xff, (uint8_t)(v0 ) & 0xff, |