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author | Haren Myneni <haren@linux.ibm.com> | 2021-08-04 12:51:02 +0530 |
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committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-08-06 12:23:35 +0530 |
commit | 1cf5e13ae554cadeb1abedd9c5cafc0d7bd56a16 (patch) | |
tree | bfbbf3848d8198d5ffb705cd5455c580403563b3 /hw/vas.c | |
parent | 7734813aa6802e3fbf9434506ab480b0b6d20c2d (diff) | |
download | skiboot-1cf5e13ae554cadeb1abedd9c5cafc0d7bd56a16.zip skiboot-1cf5e13ae554cadeb1abedd9c5cafc0d7bd56a16.tar.gz skiboot-1cf5e13ae554cadeb1abedd9c5cafc0d7bd56a16.tar.bz2 |
NX: Set VAS RMA write BAR register on P10
For each NX instance, VAS RMA write BAR register should be set with
the corresponding VAS RMA BAR value.
Refer section: 5.30 VAS RMA write BAR (P10 NX work Book V1.01)
Signed-off-by: Haren Myneni <haren@linux.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'hw/vas.c')
-rw-r--r-- | hw/vas.c | 18 |
1 files changed, 18 insertions, 0 deletions
@@ -281,6 +281,24 @@ static void get_rma_bar(struct proc_chip *chip, uint64_t *val) *val = v; } +/* Interface for NX - make sure VAS is fully initialized first */ +__attrconst uint64_t vas_get_rma_bar(int chipid) +{ + struct proc_chip *chip; + uint64_t addr; + + if (!vas_initialized) + return 0ULL; + + chip = get_chip(chipid); + if (!chip) + return 0ULL; + + get_rma_bar(chip, &addr); + + return addr; +} + /* * Initialize RMA BAR on this chip to correspond to its node/chip id. * This will cause VAS to accept paste commands to targeted for this chip. |