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| author | Alistair Popple <alistair@popple.id.au> | 2021-08-04 12:50:59 +0530 |
|---|---|---|
| committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-08-06 12:22:50 +0530 |
| commit | 048ead0d436797b7c6eadce16531b84e7437ad2a (patch) | |
| tree | 233620c8ce9aa6c9dbc359031b7a8079fa7af6a3 /hw/test | |
| parent | 02f90c12a7949c34a2d405f939bef1f352a542d4 (diff) | |
| download | skiboot-048ead0d436797b7c6eadce16531b84e7437ad2a.zip skiboot-048ead0d436797b7c6eadce16531b84e7437ad2a.tar.gz skiboot-048ead0d436797b7c6eadce16531b84e7437ad2a.tar.bz2 | |
hw/phys-map/p10: Add P10 MMIO map
Adds a phys map for P10 based on the MMIO spreadsheet. Also updates
the phys map test to take a parameter which selects which map to test.
- Introduce new BAR for the PC subengine of XIVE2
On P10, the NVP (Process) and NVG (Group) pages share the MMIO range.
The even page gives access to the NVP structure and the odd page to
the NVG structure. OPAL only uses the NVP.
- Introduce new BARs for the VC subengine of XIVE2
On P10, the source ESB pages and END ESB pages have now their own MMIO range.
- Increase the MMIO range for the END ESB pages
The range was increased to 2TB to be able to address more END entries.
We now have a maximum of 16M entries per chip. The END and ESB ranges
are reordered for alignment.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[Folded Cedric's patches - Vasant]
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'hw/test')
| -rw-r--r-- | hw/test/phys-map-test.c | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/hw/test/phys-map-test.c b/hw/test/phys-map-test.c index aa5b733..d507175 100644 --- a/hw/test/phys-map-test.c +++ b/hw/test/phys-map-test.c @@ -172,14 +172,26 @@ static void check_map_call(void) unsigned long fake_pvr[] = { 0x004e0200, /* PVR_P9 */ 0x004f0100, /* PVR_P9P */ + 0x00800100, /* PVR_P10 */ }; int main(void) { - /* Fake we are POWER9 */ - proc_gen = proc_gen_p9; - for (int i = 0; i < ARRAY_SIZE(fake_pvr); i++) { + switch(PVR_TYPE(fake_pvr[i])) { + case PVR_TYPE_P9: + case PVR_TYPE_P9P: + proc_gen = proc_gen_p9; + break; + case PVR_TYPE_P10: + proc_gen = proc_gen_p10; + break; + default: + printf("Unknown PVR 0x%lx\n", fake_pvr[i]); + return 1; + break; + } + phys_map_init(fake_pvr[i]); /* Run tests */ |